P
R
E
L
I
M
I
N
A
R
Y
I
N
F
O
R
M
A
T
I
O
N
XpressFlow-2020 Series –
Ethernet Switch Chipset
SC220
XpressFlow Engine
4.4 CAM Memory Interface:
S_CLK
C1
S_CLK
C_D[15:0]
C_CE#
C2
C_D[15:0]
C7-max
C7-min
C3
C5
C4
C6
C_MF#
C_FF#
C8-max
C8-min
C9-max
C9-min
CAM Memory Interface –
Input setup and hold timing
C_WE#
C_CM#
C10-max
C10--min
S_CLK
C11-max
C11-min
C12
C7-min
C_EC#
C_D[15:0]
CAM Memory Interface –
Output valid delay timing
CAM Memory Interface –
Output float delay timing
-40
-50
-66
Symbol
Parameter
Min Max Min Max Min Max
(ns) (ns) (ns) (ns) (ns) (ns)
Note:
C1
C2
C_D[15:0]# input set-up time
C_D[15:0]# input hold time
C_MF# input set-up time
C_MF# input hold time
C_FF# input set-up time
C_FF# input hold time
4.5
1.5
4.5
1.5
4.5
1.5
5
4
1.5
4
5
2
5
2
5
2
6
6
6
6
6
C3
C4
1.5
4
C5
C6
1.5
4
C7
C_D[15:0]# output valid delay
C_CE# output valid delay
C_WE# output valid delay
C_CM# output valid delay
C_CE# output valid delay
C_D[16:0]# output float delay
18
18
18
18
18
13
15
15
15
15
15
10
20
20
20
20
20
15
C8
5
4
C9
5
4
C10
C11
C12
5
4
5
4
AC Characteristics – CAM Memory Interface
© 1998 Vertex Networks, Inc.
28
Rev. 4.5 – February
1999
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
