P
R
E
L
I
M
I
N
A
R
Y
I
N
F
O
R
M
A
T
I
O
N
XpressFlow-2020 Series –
Ethernet Switch Chipset
SC220
XpressFlow Engine
4
AC SPECIFICATION
4.1 XpressFlow Bus Interface:
S_CLK
S_CLK
S12
S1-min
S1-max
S1-min
S_D[31:0]
S_D[31:0]
S13
S2-min
S2-max
S2-min
S_MSGEN#
S_EOF#
S_MSGEN#
S14
S3-min
S3-max
S3-min
S_EOF#
S15
S4-min
S4-max
S4-min
S_IRDY
S_IRDY
XpressFlow Bus Interface –
Output float delay timing
S6-max
S6-min
S_TABT#
S7-max
S7-min
S_CLK
S_HPREQ#
S17
S19
S21
S23
S27
S29
S31
S8-max
S8-min
S18
S20
S22
S24
S28
S30
S32
S_D[31:0]
S_MSGEN#
S_EOF#
S_GNT[7:0]#
S9-max
S9-min
S_OVLD#
XpressFlow Bus Interface –
Output valid delay timing
S_IRDY
S_TABT#
S_HPREQ#
S_REQ[7:0]#
XpressFlow Bus Interface –
Input setup and hold timing
© 1998 Vertex Networks, Inc.
24
Rev. 4.5 – February
1999
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
