MT8880C
Pin Description
Pin #
20
18
24
22
28
26
Name
ESt
Description
Data Sheet
Early Steering
output. Presents a logic high once the digital algorithm has detected a valid tone
pair (signal condition). Any momentary loss of signal condition will cause ESt to return to a logic
low.
19
23
27
St/GT
Steering Input/Guard Time
output (bidirectional). A voltage greater than V
TSt
detected at St
causes the device to register the detected tone pair and update the output latch. A voltage less than
V
TSt
frees the device to accept a new tone pair. The GT output acts to reset the external steering
time-constant; its state is a function of ESt and the voltage on St.
V
DD
Positive power supply input (+5 V typical).
NC
No Connection.
20
24
28
8, 9, 3,5,10,1
16,17 1, 16,
23-25
Functional Description
The MT8880C Integrated DTMF Transceiver architecture consists of a high performance DTMF receiver with
internal gain setting amplifier and a DTMF generator which employs a burst counter such that precise tone bursts
and pauses can be synthesized. A call progress mode can be selected such that frequencies within the specified
passband can be detected. A standard microprocessor interface allows access to an internal status register, two
control registers and two data registers.
Input Configuration
The input arrangement of the MT8880C provides a differential-input operational amplifier as well as a bias source
(V
Ref
) which is used to bias the inputs at V
DD
/2. Provision is made for connection of a feedback resistor to the op-
amp output (GS) for adjustment of gain. In a single-ended configuration, the input pins are connected as shown in
Figure 3.
Figure 4 shows the necessary connections for a differential input configuration.
IN+
C
R
IN
IN-
R
F
GS
V
Ref
VOLTAGE GAIN
(A
V
) = R
F
/ R
IN
MT8880C
Figure 3 - Single-Ended Input Configuration
3
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
