MT8880C
Data Sheet
20 PIN PLASTIC DIP/SOIC
24 PIN SSOP
Figure 2 - Pin Connections
Pin Description
Pin #
20
1
2
3
4
5
6
7
8
9
10
11
12
13
24
1
2
3
4
5
6
7
10
11
12
13
14
15
28
1
2
4
6
7
8
9
12
13
14
15
17
18
Name
IN+ Non-inverting op-amp input.
IN-
GS
Inverting op-amp input.
Gain Select.
Gives access to output of front end differential amplifier for connection of feedback
resistor.
Description
V
Ref
Reference Voltage
output, nominally V
DD
/2 is used to bias inputs at mid-rail (see Fig. 13).
V
SS
Ground input (0 V).
OSC1 DTMF clock/oscillator input. Connect a 4.7 M
Ω
resistor to VSS if crystal oscillator is used.
OSC2 Clock output. A 3.579545 MHz crystal connected between OSC1 and OSC2 completes the
internal oscillator circuit. Leave open circuit when OSC1 is clock input.
TONE
Tone
output (DTMF or single tone).
R/W
Read/Write
input. Controls the direction of data transfer to and from the MPU and the transceiver
registers. TTL compatible.
CS
Chip Select,
TTL input (CS=0 to select the chip).
RS0
Register Select
input. See register decode table. TTL compatible.
Φ2
System Clock
input. TTL compatible.
N.B.
Φ2
clock input need not be active when the device
is not being accessed.
IRQ/C
Interrupt Request to MPU
(open drain output). Also, when call progress (CP) mode has been
P selected and interrupt enabled the IRQ/CP pin will output a rectangular wave signal representative
of the input signal applied at the input op-amp. The input signal must be within the bandwidth
limits of the call progress filter. See Figure 8.
14- 18-21 19-22 D0-D3 Microprocessor Data Bus (TTL compatible). High impedance when CS = 1 or
Φ2
is low.
17
2
Zarlink Semiconductor Inc.
TONE
R/W
CS
RS0
NC
Φ2
IRQ/CP
12
13
14
15
16
17
18
IN+
IN-
GS
VRef
VSS
OSC1
OSC2
TONE
R/W
CS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDD
St/GT
ESt
D3
D2
D1
D0
IRQ/CP
Φ2
RS0
IN+
IN-
GS
VRef
VSS
OSC1
OSC2
NC
NC
TONE
R/W
CS
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VDD
St/GT
ESt
D3
D2
D1
D0
NC
NC
IRQ/CP
Φ2
RS0
4
3
2
1
28
27
26
GS
NC
IN-
IN+
VDD
St/GT
EST
NC
VRef
VSS
OSC1
OSC2
NC
NC
5
6
7
8
9
10
11
•
25
24
23
22
21
20
19
NC
NC
NC
D3
D2
D1
D0
28 PIN PLCC
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
