MT8809
Voltages are with respect to V
DD
= 5 V, V
DC
= 0 V, V
SS
= -7 V, unless otherwise stated.
Data Sheet
AC Electrical Characteristics
†
- Control and I/O Timings
- V
DC
is the external DC offset applied at the analog I/O pins.
Characteristics
1
Control Input crosstalk to switch
(for CS, DATA, STROBE,
Address)
Digital Input Capacitance
Switching Frequency
Setup Time DATA to STROBE
Hold Time DATA to STROBE
Setup Time Address to STROBE
Hold Time Address to STROBE
Setup Time CS to STROBE
Hold Time CS to STROBE
STROBE Pulse Width
RESET Pulse Width
STROBE to Switch Status Delay
DATA to Switch Status Delay
RESET to Switch Status Delay
Sym.
CX
talk
Min.
Typ.
‡
30
Max.
Units
mVpp
Test Conditions
V
IN
=3V+V
DC
squarewave;
R
IN
=1 k, R
L
=1 k.
See Appendix, Fig. A.6
f = 1 MHz
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
R
L
= 1 k,
C
L
= 50 pF
¿
Å
C
L
= 50 pF
Å
¿
C
L
= 50 pF
Å
¿
C
L
= 50 pF
Å
¿
C
L
= 50 pF
Å
¿
C
L
= 50 pF
¿
Å
C
L
= 50 pF
¿
Å
C
L
= 50 pF
Å
¿
C
L
=50 pF
Å
¿
C
L
= 50 pF
Å
¿
C
L
= 50 pF
¿
Å
2
3
4
5
6
7
8
9
10
11
12
13
14
C
DI
F
O
t
DS
t
DH
t
AS
t
AH
t
CSS
t
CSH
t
SPW
t
RPW
t
S
t
D
t
R
10
10
10
10
10
10
20
40
10
20
pF
MHz
ns
ns
ns
ns
ns
ns
ns
ns
40
50
35
100
100
100
ns
ns
ns
† Timing is over recommended temperature range. See Fig. 3 for control and I/O timing details.
Digital Input rise time (tr) and fall time (tf) = 5 ns.
‡ Typical figures are at 25
C and are for design aid only; not guaranteed and not subject to production testing.
Å
¿
Refer to Appendix, Fig. A.7 for test circuit.
t
CSS
t
CSH
50%
t
RPW
CS
50%
RESET
STROBE
t
SPW
50%
50%
50%
50%
50%
ADDRESS
50%
t
AS
50%
t
AH
50%
t
DS
t
DH
50%
DATA
ON
SWITCH*
OFF
t
D
t
S
t
R
t
R
Figure 3 - Control Memory Timing Diagram
* See Appendix, Fig. A.7 for switching waveform
6
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
