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LE58083ABGC 参数 Datasheet PDF下载

LE58083ABGC图片预览
型号: LE58083ABGC
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, A/MU-Law, 1-Func, CMOS, PBGA121, GREEN, M0-219B, LFBGA-121]
分类和应用: PC电信电信集成电路
文件页数/大小: 95 页 / 915 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Le58083
Figure 30. Monitor Receiver State Diagram
Data Sheet
Idle
MR = 1
MX
LL
MX
Initial
State
1st Byte
Received
MR = 0
MX
Abort
MR = 1
ABT
MX
Any
State
MX
MX
Byte
Valid
MR = 0
MX
LL
MX
LL
Wait for
LL MR = 0
MX
LL
MX
MX
MX
LL
MX
MX
New Byte
MR = 1
nth Byte
Received
MR = 1
MX
LL
Wait for
LL MR = 0
21108A-033
MR: MR bit transmitted on DU line
MX: MX bit received on DD line
LL: Last look at monitor byte received
ABT: Abort indication from internal source
Programming with the Monitor Channel
The Le58083 Octal SLAC device uses the monitor channel for the transfer of status or mode information to and from higher level
processors.
The messages transmitted in the monitor channel have different data structures. The first byte of monitor channel data indicates
the address of the device either sending or receiving the data.
All Monitor channel messages to and from the Le58083 Octal SLAC device begin with the following address byte::
D
7
Address
1
D
6
0
D
5
0
D
4
A
D
3
B
D
2
0
D
1
0
D
0
C
A = 0; Channel 1 is the source (upstream) or destination (downstream)
A = 1; Channel 2 is the source (upstream) or destination (downstream)
B = 0; Data destination determined by A
B = 1; Both channels, 1 and 2, receive the data
C = 0; Address for channel identification command
C = 1; Address for all other commands
69
Zarlink Semiconductor Inc.