Le58083
PRODUCT DESCRIPTION
Data Sheet
The Le58083 Octal SLAC device performs the codec/filter and two-to-four-wire conversion functions required of the subscriber
line interface circuitry in telecommunications equipment. These functions involve converting audio signals into digital PCM
samples and converting digital PCM samples back into audio signals. During conversion, digital filters are used to band limit the
voice signals. All of the digital filtering is performed in digital signal processors operating from a master clock, which can be
derived either from PCLK or MCLK in the PCM/MPI mode and DCL in the GCI mode.
The Le58083 Octal SLAC device is configured as two four-channel groups that share a common reset and PCM/GCI interface.
Each four-channel group has its own chip select for individual programming. The signal names for each four-channel SLAC
device are differentiated by _1 or _2. Generic naming of each signal is
C
_X, where the subscript
C
equals the channel number
1 through 4 and the _X equals the four-channel group number 1 or 2. For example, VIN
3
_2 would identify channel 3 of the second
four-channel group.
Eight independent channels allow the Le58083 Octal SLAC device to function as eight SLAC devices. In PCM/MPI mode, each
channel has its own enable bit (EC1, EC2, EC3, etc.) to allow individual channel programming. If more than one Channel Enable
bit is High or if all Channel Enable bits are High, all channels enabled will receive the programming information written; therefore,
a Broadcast mode can be implemented by simply enabling all channels in the device to receive the information and enabling both
chip selects. The Channel Enable bits are contained in the Channel Enable (EC) register, which is written and read using
Commands 4A/4Bh. The Broadcast mode is useful in initializing Le58083 Octal SLAC devices in a large system.
In GCI mode, one GCI channel controls two channels of the Le58083 Octal SLAC device. The Monitor channel and SC channel
within the GCI channel are used to read/write filter coefficient data, read/write operating conditions and to read/write data to/from
the programmable I/O ports of the two channels. Two pairs of GCI channels control the two four-channel groups in the Le58083
Octal SLAC device. The four GCI channels used, of the eight total available, are determined by S0 and S1 inputs.
The user-programmable filters set the receive and transmit gain, perform the transhybrid balancing function, permit adjustment
of the two-wire termination impedance, and provide equalization of the receive and transmit paths. All programmable digital filter
coefficients can be calculated using the WinSLAC™ software.
In PCM/MPI mode, Data transmitted or received on the PCM highway can be 8-bit companded code (with an optional 8-bit
signaling byte in the transmit direction) or 16-bit linear code. The 8-bit codes appear 1 byte per time slot, while the 16-bit code
appears in two consecutive time slots. The compressed PCM codes can be either 8-bit companded A-law or µ-law. The PCM
data is read from and written to the PCM highway in user-programmable time slots at rates of 128 kHz to 8.192 MHz. The transmit
clock edge and clock slot can be selected for compatibility with other devices that can be connected to the PCM highway.
In GCI mode, two 8-bit companded codes are received or transmitted per GCI channel. The compressed PCM codes can be
either 8-bit companded A-law or µ-law. There is no Signaling or Linear mode available when GCI mode is selected.
The programming software is backward compatible to the
Zarlink
Le58000 SLAC family of devices.
DEVICE DESCRIPTION
PCM/GCI Highway
Dual/single
Programmable I/O
per Channel
Five I/O
Two Output
Chopper Clock
Yes
Package
BGA
Part Number
Le58083GC
BLOCK DESCRIPTIONS
Clock and Reference Circuits
This block generates a master clock and a frame sync signal for the digital circuits. It also generates an analog reference voltage
for the analog circuits.
Microprocessor Interface (MPI)
This block communicates with the external control microprocessor over a serial interface. It passes user control information to
the other blocks, and it passes status information from the blocks to the user. In addition, this block contains the reset circuitry.
When GCI is selected, this block is combined with the TSA block.
Time Slot Assigner (TSA)
This block communicates with the PCM highway, where the PCM highway is a time division mutiplexed bus carrying the digitized
voice samples. The block implements programmable time slots and clocking arrangements in order to achieve a first layer of
switching. Internally, this block communicates with the Signal Processing Channels (CHx). When GCI is selected, this block is
combined with the TSA block.
6
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
