P
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L
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A
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F
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XpressFlow-2020 Series –
Ethernet Switch Chipset
EA218
6+2 Ports 10Mb Ethernet Access Controller
2. FUNCTIONAL DESCRIPTION
2.1 Local Memory (Local Buffer Memory) Interface
ꢀ Uses industry standard Synchronous Burst Mode SRAM up to 1M bytes
32k x 32, 64k x 32, 128k x 32, or 256k x 32
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ꢀ Provides separate Read and Write Chip Selects ( L_OE[3:0]# and L_WE[3:0]# ) for each memory chip
ꢀ Supports back to back Read or Write operations across memory chips
2.1.1 Pin Description
Symbol
L_D[31:0]
Type
Name and Functions
TTL I/O-TS
Local Memory Data Bus Bit [31:0] – a 32-bit synchronous data bus.
ꢂ
L_A[18:2]
CMOS Output Local Memory Address Bus Bit [18:2] – Bit [18:2] of a synchronous address bus. The
memory address is sampled when L_CS# is enabled and L_ADSC# is asserted.
L_A[19] /
L_OE[3]#
CMOS Output Local Memory Address Bus Bit [19] or Local Memory Read Chip Select [3] – De-
pends on memory configuration, this pin can be used as the Local Memory Address Bit
[19] or as the Local Memory Read Chip Select [3].
L_OE[2:0]#
L_WE[3:0]#
CMOS Output Local Memory Read Chip Select [2:0] – allows up to read one of the 4 banks of mem-
ory.
CMOS Output Local Memory Write Chip Select [3:0] – allows up to write one of the 4 banks of mem-
ory.
L_BWE[3:0]#
L_ADSC#
L_CLK
CMOS Output Local Memory Byte Write Enable [3:0] – use to write individual bytes.
CMOS Output Local Memory Controller Address Status – to load a new address.
CMOS Output Local Memory Clock – a synchronous clock to memory devices.
L_D[31:0]
L_A[18:2]
TTL I/O-TS
Local Memory Data Bus Bit [31:0] – a 32-bit synchronous data bus.
CMOS Output Local Memory Address Bus Bit [18:2] – Bit [17:2] of a synchronous address bus. The
memory address is sampled when L_CS# is enabled and L_ADSC# is asserted.
L_A[19] /
L_WE[3]#
CMOS Output Local Memory Address Bus Bit [19] or Local Memory Write Chip Select [3] – De-
pends on memory configuration, this pin can be used as the Local Memory Address Bit
[19] or as the Local Memory Write Chip Select [3].
L_WE[2:0]#
L_OE[3:0]#
CMOS Output Local Memory Write Chip Select [2:0] – allows up to write one of the 4 banks of mem-
ory.
CMOS Output Local Memory Read Chip Select [3:0] – allows up to read one of the 4 banks of mem-
ory.
L_BWE[3:0]#
L_ADSC#
L_CLK
CMOS Output Local Memory Byte Write Enable [3:0] – use to write individual bytes.
CMOS Output Local Memory Controller Address Status – to load a new address.
CMOS Output Local Memory Clock – a synchronous clock to memory devices.
Note:
ꢂ These pins have weak internal pull up resistors (50k to 100k Ohms each).
© 1998 Zarlink Semiconductor, Inc.
8
Rev. 2.1- February, 1999
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
