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EA218I6BTAV 参数 Datasheet PDF下载

EA218I6BTAV图片预览
型号: EA218I6BTAV
PDF下载: 下载PDF文件 查看货源
内容描述: [LAN Controller, CMOS, PBGA352]
分类和应用: 局域网外围集成电路
文件页数/大小: 27 页 / 358 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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XpressFlow-2020 Series –  
Ethernet Switch Chipset  
EA218  
6+2 Ports 10Mb Ethernet Access Controller  
Pin No(s).  
Symbol  
Type  
Name and Functions  
Control Buffer Memory Interface  
M4,N2,L3,M1,M2,L1,K3,  
L2,K4,K1,J3,K2,J1,J2,  
H3,H1,H2,G3,G1,G2,F1,F3,F  
2,E1,E3,E2,D1,D3,D2,C1,C2,  
B1  
L_D[31:0]  
TTL I/O-TS  
8mA  
Local Memory Bus – Data Bit [31:0]  
A6,B6,C8,A7,D8,D7,C9,  
A8,B8,A9,C10,B9,D10,  
A10,C11,B10,A11  
L_A[18:2]  
CMOS Output  
CMOS Output  
8mA  
8mA  
Local Memory Bus – Address Bit [17:2]  
C7  
L_A[19] /  
L_OE[3]#  
Local Memory Bus – Address Bit [19] or Memory  
Read Chip Select [3]  
D5,A5,A3  
D7,E4,B5,C4  
C6,B4,A4,C5  
B3  
L_OE[2:0]#  
L_WE[3:0]#  
L_BWE[3:0]#  
L_ADSC#  
L_CLK  
CMOS Output  
CMOS Output  
CMOS Output  
CMOS Output  
CMOS Output  
2mA  
2mA  
8mA  
8mA  
8mA  
Local Memory Read Chip Select [2:0]  
Local Memory Write Chip Select [3:0]  
Local Memory Byte Write Enable, Byte [3:0]  
Local Memory Controller Address Status  
Local Memory Clock input  
G4  
Ethernet Access Port cont. [7:0]  
AF20,AE17,AD12,AD9,  
AC2,T25  
T[7:2]_RXD  
TTL In (5VT)  
Receive Data – (one for each 10Mbps Serial In-  
terface Port)  
AC25,AF6  
T[1:0]_RXD  
TTL In (5VT)  
TTL In (5VT)  
AD19,AD16,AE14,AF10,AC2 T[7:2]_RXC  
1U24  
Receive Clock – (one for each 10Mbps Serial In-  
terface Port)  
AC24,AE7  
T[1:0]_RXC  
T[7:0]_TXC  
TTL In (5VT)  
TTL In (5VT)  
AF18,AD14,AE12,AF8,  
W2,AA25,AE22,AD1  
Transmit Clock – (one for each 10Mbps Serial In-  
terface Port)  
AE19,AF15,AF12,AD8,  
W1,AA24  
T[7:2]_TXEN  
CMOS Out  
4mA  
4mA  
2mA  
2mA  
Transmit Enable – (one for each 10Mbps Serial  
Interface Port)  
AF22,AF2  
T[1:0]_TXEN  
T[7:2]_TXD  
CMOS Output  
CMOS Out  
AE20,AF16,AF13,AE10,  
Y1,W25  
Transmit Data – (one for each 10Mbps Serial In-  
terface Port)  
AF23,AE4  
T[1:0]_TXD  
CMOS Output  
AD18,AD15,AE13,AF9,  
Y2,Y26  
T[7:2]_LPBK CMOS Out  
Loop Back Enable – (one for each 10Mbps Serial  
Interface Port)  
AE23,AF3  
T[1:0]_LPBK CMOS Output  
AF19,AE16,AD11,AE9,  
V3,AA26  
T[7:2]_FD  
CMOS Out  
Full Duplex Mode – (one for each 10Mbps Serial  
Interface Port)  
AD21,AE3  
T[1:0]_FD  
CMOS Output  
AD17,AE15,AF11,AE8,  
V1,AB26  
T[7:2]_COL  
TTL In (5VT)  
Collision Detected – (one for each 10Mbps Serial  
Interface Port)  
AD20,AC23  
T[1:0]_COL  
T[7:2]_CRS  
TTL In (5VT)  
TTL In (5VT)  
AE18,AD13,AD10,AD7,  
U3,AB24,  
Carrier Sense – (one for each 10Mbps Serial In-  
terface Port)  
AF21,AD2  
T[1:0]_CRS  
TTL In (5VT)  
AF17,AF14,AE11,AF7,  
V2,AB25,  
T[7:2]_LNK TTL In (5VT)  
Link Status – (one for each 10Mbps Serial Inter-  
face Port)  
AE21,AB3  
T[1:0]_LNK TTL In (5VT)  
© 1998 Zarlink Semiconductor, Inc.  
5
Rev. 2.1- February, 1999  
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