R
Platform Flash In-System Programmable Configuration PROMs
Symbol
Description
Clock period
(6)
(serial mode) when V
CCO
= 3.3V or 2.5V
XCF01S, XCF02S,
XCF04S
Min
30
67
–
–
10
15
10
15
20
30
250
250
250
250
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
XCF08P, XCF16P,
XCF32P
Min
25
25
30
30
12
12
12
12
30
30
2000
2000
2000
2000
12
12
8
8
300
300
300
300
300
300
300
300
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Max
–
–
–
–
–
–
–
–
–
Max
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
T
CYC
Clock period
(6)
(serial mode) when V
CCO
= 1.8V
Clock period
(6)
(parallel mode) when V
CCO
= 3.3V or 2.5V
Clock period
(6)
(parallel mode) when V
CCO
= 1.8V
CLK Low time
(3)
when V
CCO
= 3.3V or 2.5V
CLK Low time
(3)
when V
CCO
= 1.8V
CLK High time
(3)
when V
CCO
= 3.3V or 2.5V
CLK High time
(3)
when V
CCO
= 1.8V
CE setup time to CLK (guarantees proper counting)
(3)
when V
CCO
= 3.3V or 2.5V
CE setup time to CLK (guarantees proper counting)
(3)
when V
CCO
= 1.8V
CE hold time (guarantees counters are reset)
(5)
when V
CCO
= 3.3V or 2.5V
CE hold time (guarantees counters are reset)
(5)
when V
CCO
= 1.8V
OE/RESET hold time (guarantees counters are reset)
(6)
when V
CCO
= 3.3V or 2.5V
OE/RESET hold time (guarantees counters are reset)
(6)
when V
CCO
= 1.8V
BUSY setup time to CLK when V
CCO
= 3.3V or 2.5V
(8)
BUSY setup time to CLK when V
CCO
= 1.8V
(8)
BUSY hold time to CLK when V
CCO
= 3.3V or 2.5V
(8)
BUSY hold time to CLK when V
CCO
= 1.8V
(8)
EN_EXT_SEL setup time to CF, CE or OE/RESET
when V
CCO
= 3.3V or 2.5V
(8)
EN_EXT_SEL setup time to CF, CE or OE/RESET
when V
CCO
= 1.8V
(8)
EN_EXT_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 3.3V or 2.5V
(8)
EN_EXT_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 1.8V
(8)
REV_SEL setup time to CF, CE or OE/RESET
when V
CCO
= 3.3V or 2.5V
(8)
REV_SEL setup time to CF, CE or OE/RESET
when V
CCO
= 1.8V
(8)
REV_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 3.3V or 2.5V
(8)
REV_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 1.8V
(8)
T
LC
T
HC
T
SCE
T
HCE
T
HOE
T
SB
T
HB
T
SXT
T
HXT
T
SRV
T
HRV
Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady-state active levels.
All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
If T
HCE
High < 2
µs,
T
CE
= 2
µs.
If T
HOE
Low < 2
µs,
T
OE
= 2
µs.
This is the minimum possible T
CYC
. Actual T
CYC
= T
CAC
+ FPGA Data setup time. Example: With the XCF32P in serial mode with V
CCO
at
3.3V, if FPGA data setup time = 15 ns, then the actual T
CYC
= 25 ns +15 ns = 40 ns.
Guaranteed by design; not tested.
CF, EN_EXT_SEL, REV_SEL[1:0], and BUSY are inputs for the XCFxxP PROM only.
When JTAG CONFIG command is issued, PROM drives CF Low for at least the T
HCF
minimum.
DS123 (v2.17) October 26, 2009
Product Specification
17
XILINX [ XILINX, INC ]
