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XC6VLX75T-1FFG484C 参数 Datasheet PDF下载

XC6VLX75T-1FFG484C图片预览
型号: XC6VLX75T-1FFG484C
PDF下载: 下载PDF文件 查看货源
内容描述: [Field Programmable Gate Array, 1098MHz, 74496-Cell, CMOS, PBGA484, 23 X 23 MM, LEAD FREE, FBGA-484]
分类和应用: 时钟可编程逻辑
文件页数/大小: 65 页 / 1429 K
品牌: XILINX [ XILINX, INC ]
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Virtex-6 FPGA Data Sheet: DC and Switching Characteristics  
Speed Grade  
Table 58: DSP48E1 Switching Characteristics (Cont’d)  
Symbol  
Description  
Units  
-1  
(XC)  
-1  
(XQ)  
-3  
-2  
-1L  
RSTP input to P register CLK  
0.26/ 0.30/ 0.35/  
0.35/ 0.43/  
ns  
T
/ T  
DSPDCK_RSTP_PREG DSPCKD_RSTP_PREG  
0.04 0.04  
0.05  
0.05  
0.06  
Combinatorial Delays from Input Pins to Output Pins  
TDSPDO_{A, B}_{P, CARRYOUT}_MULT  
{A, B} input to {P, CARRYOUT}  
output using multiplier  
3.76 4.29  
3.57 4.07  
1.55 1.76  
1.38 1.56  
5.08  
4.82  
2.07  
1.83  
5.08  
4.82  
2.07  
1.83  
5.87  
5.57  
2.41  
2.13  
ns  
ns  
ns  
ns  
TDSPDO_D_{P, CARRYOUT}_MULT  
TDSPDO_{A, B}_{P, CARRYOUT}  
D input to {P, CARRYOUT}  
output using multiplier  
{A, B} input to {P, CARRYOUT}  
output not using multiplier  
TDSPDO_{C, CARRYIN}_{P, CARRYOUT}  
{C, CARRYIN} input to {P,  
CARRYOUT} output  
Combinatorial Delays from Input Pins to Cascading Output Pins  
TDSPDO_{A; B}_{ACOUT; BCOUT}  
{A, B} input to {ACOUT, BCOUT} 0.49 0.56  
output  
0.65  
5.24  
0.65  
5.24  
0.73  
6.09  
ns  
ns  
TDSPDO_{A, B}_{PCOUT, CARRYCASCOUT,  
MULTSIGNOUT}_MULT  
{A, B} input to {PCOUT,  
CARRYCASCOUT,  
MULTSIGNOUT} output using  
multiplier  
3.87 4.42  
3.66 4.17  
1.64 1.86  
TDSPDO_D_{PCOUT, CARRYCASCOUT,  
MULTSIGNOUT}_MULT  
D input to {PCOUT,  
CARRYCASCOUT,  
MULTSIGNOUT} output using  
multiplier  
4.94  
2.19  
1.95  
4.94  
2.19  
1.95  
5.76  
2.60  
2.32  
ns  
ns  
ns  
TDSPDO_{A, B}_{PCOUT, CARRYCASCOUT, MULTSIGNOUT}  
{A, B} input to {PCOUT,  
CARRYCASCOUT,  
MULTSIGNOUT} output not  
using multiplier  
TDSPDO__{C, CARRYIN}_{PCOUT,  
CARRYCASCOUT,MULTSIGNOUT}  
{C, CARRYIN} input to {PCOUT, 1.46 1.66  
CARRYCASCOUT,  
MULTSIGNOUT} output  
Combinatorial Delays from Cascading Input Pins to All Output Pins  
TDSPDO_{ACIN, BCIN}_{P, CARRYOUT}_MULT  
TDSPDO_{ACIN, BCIN}_{P, CARRYOUT  
TDSPDO_{ACIN; BCIN}_{ACOUT; BCOUT}  
{ACIN, BCIN} input to {P,  
CARRYOUT} output using  
multiplier  
3.67 4.19  
1.43 1.63  
4.97  
1.92  
4.97  
1.92  
5.75  
2.25  
ns  
ns  
{ACIN, BCIN} input to {P,  
CARRYOUT} output not using  
multiplier  
{ACIN, BCIN} input to {ACOUT,  
BCOUT} output  
0.36 0.42  
3.76 4.29  
0.49  
5.10  
0.49  
5.10  
0.56  
5.94  
ns  
ns  
TDSPDO_{ACIN, BCIN}_{PCOUT, CARRYCASCOUT,  
MULTSIGNOUT}_MULT  
{ACIN, BCIN} input to {PCOUT,  
CARRYCASCOUT,  
MULTSIGNOUT} output using  
multiplier  
TDSPDO_{ACIN, BCIN}_{PCOUT, CARRYCASCOUT,  
MULTSIGNOUT}  
{ACIN, BCIN} input to {PCOUT,  
CARRYCASCOUT,  
MULTSIGNOUT} output not  
using multiplier  
1.52 1.73  
1.19 1.35  
2.05  
1.60  
2.05  
1.60  
2.44  
1.87  
ns  
ns  
TDSPDO_{PCIN, CARRYCASCIN, MULTSIGNIN}_  
{P, CARRYOUT}  
{PCIN, CARRYCASCIN,  
MULTSIGNIN} input to {P,  
CARRYOUT} output  
DS152 (v3.6) March 18, 2014  
www.xilinx.com  
Product Specification  
47  
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