Spartan-3E FPGA Family: Functional Description
The BCIN and BCOUT ports have associated dedicated
routing that connects adjacent multipliers within the same
column. Via the cascade connection, the BCOUT port of
one multiplier block drives the BCIN port of the multiplier
block directly above it. There is no connection to the BCIN
port of the bottom-most multiplier block in a column or a
connection from the BCOUT port of the top-most block in a
column. As an example, Figure 39 shows the multiplier
cascade capability within the XC3S100E FPGA, which has
a single column of multiplier, four blocks tall. For clarity, the
figure omits the register control inputs.
X-Ref Target - Figure 39
BCOUT
A
B
P
P
P
P
B_INPUT = CASCADE
B_INPUT = CASCADE
B_INPUT = CASCADE
B_INPUT = DIRECT
BCIN
BCOUT
A
B
BCIN
BCOUT
A
B
BCIN
BCOUT
A
B
BCIN
DS312-2_30_021505
Figure 39: Multiplier Cascade Connection
When using the BREG register, the cascade connection
forms a shift register structure typically used in DSP
algorithms such as direct-form FIR filters. When the BREG
register is omitted, the cascade structure essentially feeds
the same input value to more than one multiplier. This
parallel connection serves to create wide-input multipliers,
implement transpose FIR filters, and is used in any
application that requires that several multipliers have the
same input value.
DS312 (v4.2) December 14, 2018
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Product Specification
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