R
Functional Description
Table 45: Variant Select Codes for SPI Serial Flash PROMs
SPI Read
Command
Dummy
Bytes
VS2 VS1 VS0
SPI Serial Flash Vendor
STMicroelectronics (ST)
SPI Flash Family
M25Pxx
NexFlash
NX25Pxx
FAST READ (0x0B)
(see Figure 50)
1
1
0
1
1
SST25LFxxxA
SST25VFxxxA
Silicon Storage Technology (SST)
Programmable Microelectronics Corp. (PMC) Pm25LVxxx
STMicroelectronics (ST)
NexFlash
M25Pxx
NX25Pxx
READ (0x03)
SST25LFxxxA
SST25VFxxxA
SST25VFxxx
1
1
1
0
0
3
(see Figure 50)
Silicon Storage Technology (SST)
Programmable Microelectronics Corp. (PMC) Pm25LVxxx
READ ARRAY
(0xE8)
1
Atmel Corporation AT45DB DataFlash
(see Figure 51)
Others
Reserved
W
Table 46 shows the connections between the SPI Flash
are not used by the FPGA during configuration. However,
the HOLD pin must be High during the configuration pro-
cess. The PROM’s write protect input must be High in order
to write or program the Flash memory.
PROM and the FPGA’s SPI configuration interface. Each
SPI Flash PROM vendor uses slightly different signal nam-
ing. The SPI Flash PROM’s write protect and hold controls
Table 46: SPI Flash PROM Connections and Pin Naming
Silicon
Storage
Atmel
SPI Flash Pin
DATA_IN
FPGA Connection
STMicro
NexFlash Technology
DataFlash
MOSI
DIN
D
Q
S
C
DI
DO
CS
SI
SI
SO
DATA_OUT
SELECT
SO
CSO_B
CCLK
CE#
SCK
CS
CLOCK
CLK
SCK
Not required for FPGA configuration. Must be
High to program SPI Flash. Optional
connection to FPGA user I/O after
configuration.
WR_PROTECT
W
WP
WP#
WP
N/A
W
Not required for FPGA configuration but must
be High during configuration. Optional
connection to FPGA user I/O after
configuration. Not applicable to Atmel
DataFlash.
HOLD
HOLD
HOLD
HOLD#
(see Figure 50)
DS312-2 (v1.1) March 21, 2005
www.xilinx.com
65
Advance Product Specification
XILINX [ XILINX, INC ]
