R
Functional Description
+1.2V
+3.3V
SPI
Serial
Flash
VCCINT
P
P
HSWAP
VCCO_0
VCCO_0
+3.3V
I
VCC
DATA_IN
VCCO_2
MOSI
SPI Mode
DIN
DATA_OUT
SELECT
‘0’
‘0’
‘1’
M2
M1
M0
CSO_B
W
WR_PROTECT
HOLD
‘1’
CLOCK
Variant Select
Spartan-3E
FPGA
GND
‘1’
S
VS2
VS1
VS0
+3.3V
‘1’
CCLK
DOUT
INIT_B
+2.5V
JTAG
+2.5V
VCCAUX
TDO
+2.5V
TDI
TMS
TCK
TDO
TDI
TMS
TCK
PROG_B
DONE
GND
PROG_B
Recommend
open-drain
driver
DS312-2_46_021405
Figure 50: SPI Flash PROM Interface for PROMs Supporting READ (0x03) and FAST_READ (0x0B)
S
Although SPI is a standard four-wire interface, various
Figure 50 shows the general connection diagram for those
SPI Flash PROMs that support the 0x03 READ command
or the 0x0B FAST READ commands.
available SPI Flash PROMs use different command proto-
cols. The FPGA’s variant select pins, VS[2:0], define how
the FPGA communicates with the SPI Flash, including
which SPI Flash command the FPGA issues to start the
read operation and the number of dummy bytes inserted
before the FPGA expects to receive valid data from the SPI
Flash. Table 45 shows the available SPI Flash PROMs
expected to operate with Spartan-3E FPGAs. Other com-
patible devices might work but have not been tested for suit-
ability with Spartan-3E FPGAs. All other VS[2:0] values are
reserved for future use.
Figure 51 shows the connection diagram for Atmel
DataFlash serial PROMs, which also use an SPI-based pro-
tocol.
Figure 54 demonstrates how to configure multiple FPGAs
with different configurations, all stored in a single SPI Flash.
The diagram uses standard SPI Flash memories but the
same general technique applies for Atmel DataFlash.
DS312-2 (v1.1) March 21, 2005
www.xilinx.com
63
Advance Product Specification
XILINX [ XILINX, INC ]
