R
Pinout Descriptions
The XC3S250E FPGA in the FT256 package has 18 uncon-
nected balls, labeled with an “N.C.” type. These pins are
also indicated with the black diamond (ꢃ) symbol in
Figure 7.
User I/Os by Bank
Table 20, Table 21, and Table 22 indicate how the available
user-I/O pins are distributed between the four I/O banks on
the FT256 package.
Table 20: User I/Os Per Bank on XC3S250E in the FT256 Package
All Possible I/O Pins by Type
Package
Edge
Maximum
I/O
I/O Bank
I/O
20
10
8
INPUT
DUAL
1
VREF
GCLK
Top
0
1
2
3
44
42
10
7
5
4
8
0
Right
21
24
0
Bottom
Left
44
9
3
0
42
24
62
7
3
8
TOTAL
172
33
46
15
16
Table 21: User I/Os Per Bank on XC3S500E in the FT256 Package
All Possible I/O Pins by Type
Package
Edge
Maximum
I/O
I/O Bank
I/O
22
15
11
28
76
INPUT
DUAL
1
VREF
GCLK
Top
0
1
2
3
46
48
10
7
5
5
8
0
Right
21
24
0
Bottom
Left
48
9
4
0
48
7
5
8
TOTAL
190
33
46
19
16
Table 22: User I/Os Per Bank on XC3S1200E in the FT256 Package
All Possible I/O Pins by Type
Package
Edge
Maximum
I/O
I/O Bank
I/O
24
14
13
27
78
INPUT
DUAL
1
VREF
GCLK
Top
0
1
2
3
46
48
8
8
5
5
8
0
Right
21
24
0
Bottom
Left
48
7
4
0
48
8
5
8
TOTAL
190
31
46
19
16
36
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DS312-4 (v1.1) March 21, 2005
Advance Product Specification
XILINX [ XILINX, INC ]
