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Pinout Descriptions
Table 1: Types of Pins on Spartan-3E FPGAs
Type /
Color Code
Description
Pin Name(s) in Type
JTAG
Dedicated JTAG pin. Not available as a user-I/O pin. Every package has four
dedicated JTAG pins. These pins are powered by VCCAUX.
TDI, TMS, TCK, TDO
GND
Dedicated ground pin. The number of GND pins depends on the package used. GND
All must be connected.
VCCAUX
VCCINT
VCCO
Dedicated auxiliary power supply pin. The number of VCCAUX pins depends on VCCAUX
the package used. All must be connected to +2.5V.
Dedicated internal core logic power supply pin. The number of VCCINT pins
depends on the package used. All must be connected to +1.2V.
VCCINT
Along with all the other VCCO pins in the same bank, this pin supplies power to VCCO_#
the output buffers within the I/O bank and sets the input threshold voltage for
some I/O standards.
N.C.
This package pin is not connected in this specific device/package combination N.C.
but may be connected in larger devices in the same package.
Notes:
1. # = I/O bank number, an integer between 0 and 3.
I/Os with Lxxy_# are part of a differential output pair. ‘L’ indi-
cates differential output capability. The “xx” field is a
two-digit integer, unique to each bank that identifies a differ-
ential pin-pair. The ‘y’ field is either ‘P’ for the true signal or
‘N’ for the inverted signal in the differential pair. The ‘#’ field
is the I/O bank number.
significance. Figure 1 provides a specific example showing
a differential input to and a differential output from Bank 1.
‘L’ indicates that the pin is part of a differentiaL pair.
"xx" is a two-digit integer, unique for each bank, that
identifies a differential pin-pair.
‘y’ is replaced by ‘P’ for the true signal or ‘N’ for the
inverted. These two pins form one differential pin-pair.
Differential Pair Labeling
A pin supports differential standards if the pin is labeled in
the format “Lxxy_#”. The pin name suffix has the following
‘#’ is an integer, 0 through 3, indicating the associated
I/O bank.
Pair Number
Bank 0
Bank Number
IO_L38P_1
IO_L38N_1
Positive Polarity,
True Driver
IO_L39P_1
Spartan-3E
FPGA
IO_L39N_1
Negative Polarity,
Inverted Driver
Bank 2
DS312-4_00_022305
Figure 1: Differential Pair Labeling
2
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DS312-4 (v1.1) March 21, 2005
Advance Product Specification
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