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XC2S400E-6FG456C 参数 Datasheet PDF下载

XC2S400E-6FG456C图片预览
型号: XC2S400E-6FG456C
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- IIE FPGA [Spartan-IIE FPGA]
分类和应用:
文件页数/大小: 108 页 / 5063 K
品牌: XILINX [ XILINX, INC ]
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R
Spartan-IIE FPGA Family: DC and Switching Characteristics  
Period Tolerance: the allowed input clock period change in nanoseconds.  
1
T
=
CLKIN  
F
+ T  
_
IPTOL  
T
CLKIN  
CLKIN  
Output Jitter: the difference between an ideal  
reference clock edge and the actual design.  
Phase Offset and Maximum Phase Difference  
Ideal Period  
Actual Period  
+/- Jitter  
+ Maximum  
Phase Difference  
+ Phase Offset  
DS001_52_090800  
Figure 22: Period Tolerance and Clock Jitter  
44  
www.xilinx.com  
DS077-3 (v2.3) June 18, 2008  
Product Specification  
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