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DS312_09 参数 Datasheet PDF下载

DS312_09图片预览
型号: DS312_09
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- 3E FPGA系列:介绍和订购信息 [Spartan-3E FPGA Family: Introduction and Ordering Information]
分类和应用:
文件页数/大小: 233 页 / 5527 K
品牌: XILINX [ XILINX, INC ]
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R
DC and Switching Characteristics  
Single-Ended I/O Standards  
Table 80: Recommended Operating Conditions for User I/Os Using Single-Ended Standards  
(2)  
V
for Drivers  
V
V
V
IH  
CCO  
REF  
IL  
IOSTANDARD  
Attribute  
Min (V) Nom (V) Max (V) Min (V)  
Nom (V)  
Max (V)  
Max (V)  
0.8  
Min (V)  
2.0  
LVTTL  
3.0  
3.0  
2.3  
1.65  
1.4  
1.1  
3.0  
3.0  
1.7  
1.7  
1.7  
2.3  
3.3  
3.3  
2.5  
1.8  
1.5  
1.2  
3.3  
3.3  
1.8  
1.8  
1.8  
2.5  
3.465  
3.465  
2.7  
(4)  
LVCMOS33  
LVCMOS25  
LVCMOS18  
LVCMOS15  
LVCMOS12  
0.8  
2.0  
(4,5)  
0.7  
1.7  
1.95  
1.6  
0.4  
0.8  
V
is not used for  
REF  
these I/O standards  
0.4  
0.8  
1.3  
0.4  
0.7  
(6)  
0.5 V  
PCI33_3  
3.465  
3.465  
1.9  
0.3 V  
CCO  
CCO  
CCO  
(6)  
0.5 V  
PCI66_3  
0.3 V  
CCO  
HSTL_I_18  
0.8  
-
0.9  
1.1  
1.1  
-
V
- 0.1  
- 0.1  
V
V
+ 0.1  
+ 0.1  
REF  
REF  
REF  
REF  
HSTL_III_18  
SSTL18_I  
SSTL2_I  
1.9  
V
1.9  
0.833  
1.15  
0.900  
1.25  
0.969  
1.35  
V
- 0.125  
- 0.125  
V
+ 0.125  
+ 0.125  
REF  
REF  
REF  
REF  
2.7  
V
V
Notes:  
1. Descriptions of the symbols used in this table are as follows:  
V
V
V
V
– the supply voltage for output drivers  
– the reference voltage for setting the input switching threshold  
– the input voltage that indicates a Low logic level  
– the input voltage that indicates a High logic level  
CCO  
REF  
IL  
IH  
2. The V  
rails supply only output drivers, not input circuits.  
CCO  
3. For device operation, the maximum signal voltage (V max) may be as high as V max. See Table 73.  
IH  
IN  
4. There is approximately 100 mV of hysteresis on inputs using LVCMOS33 and LVCMOS25 I/O standards.  
5. All Dedicated pins (PROG_B, DONE, TCK, TDI, TDO, and TMS) use the LVCMOS25 standard and draw power from the V  
rail (2.5V).  
CCAUX  
The Dual-Purpose configuration pins use the LVCMOS standard before the User mode. When using these pins as part of a standard 2.5V  
configuration interface, apply 2.5V to the V lines of Banks 0, 1, and 2 at power-on as well as throughout configuration.  
CCO  
6. For information on PCI IP solutions, see www.xilinx.com/pci. The PCIX IOSTANDARD is available and has equivalent characteristics but no  
PCI-X IP is supported.  
122  
www.xilinx.com  
DS312-3 (v3.8) August 26, 2009  
Product Specification  
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