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DS312_09 参数 Datasheet PDF下载

DS312_09图片预览
型号: DS312_09
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- 3E FPGA系列:介绍和订购信息 [Spartan-3E FPGA Family: Introduction and Ordering Information]
分类和应用:
文件页数/大小: 233 页 / 5527 K
品牌: XILINX [ XILINX, INC ]
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R
DC and Switching Characteristics  
Quiescent Current Requirements  
Table 79: Quiescent Supply Current Characteristics  
Commercial  
Maximum  
Industrial  
Maximum  
(2)  
(2)  
(2)  
Symbol  
Description  
Device  
Typical  
8
Units  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
I
Quiescent V  
supply current XC3S100E  
XC3S250E  
27  
36  
CCINTQ  
CCINT  
15  
78  
104  
145  
324  
457  
1.5  
XC3S500E  
25  
106  
259  
366  
1.0  
1.0  
1.0  
2.0  
2.0  
12  
XC3S1200E  
50  
XC3S1600E  
65  
I
Quiescent V  
supply current  
XC3S100E  
XC3S250E  
XC3S500E  
XC3S1200E  
XC3S1600E  
XC3S100E  
XC3S250E  
XC3S500E  
XC3S1200E  
XC3S1600E  
0.8  
0.8  
0.8  
1.5  
1.5  
8
CCOQ  
CCO  
1.5  
1.5  
2.5  
2.5  
I
Quiescent V  
current  
supply  
13  
CCAUXQ  
CCAUX  
12  
22  
26  
18  
31  
34  
35  
52  
59  
45  
76  
86  
Notes:  
1. The numbers in this table are based on the conditions set forth in Table 77.  
2. Quiescent supply current is measured with all I/O drivers in a high-impedance state and with all pull-up/pull-down resistors at the I/O pads  
disabled. Typical values are characterized using typical devices at room temperature (T of 25°C at V = 1.2 V, V = 3.3V, and V  
CCAUX  
J
CCINT  
CCO  
= 2.5V). The maximum limits are tested for each device at the respective maximum specified junction temperature and at maximum voltage  
limits with V = 1.26V, V = 3.465V, and V = 2.625V. The FPGA is programmed with a “blank” configuration data file (i.e., a  
CCINT  
CCO  
CCAUX  
design with no functional elements instantiated). For conditions other than those described above, (e.g., a design including functional  
elements), measured quiescent current levels may be different than the values in the table. For more accurate estimates for a specific  
design, use the Xilinx® XPower tools.  
3. There are two recommended ways to estimate the total power consumption (quiescent plus dynamic) for a specific design: a) The  
Spartan-3E XPower Estimator provides quick, approximate, typical estimates, and does not require a netlist of the design. b) XPower  
Analyzer uses a netlist as input to provide maximum estimates as well as more accurate typical estimates.  
4. The maximum numbers in this table indicate the minimum current each power rail requires in order for the FPGA to power-on successfully.  
DS312-3 (v3.8) August 26, 2009  
www.xilinx.com  
121  
Product Specification  
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