R
Functional Description
Table 69: Spartan-3E FPGA Bitstream Generator (BitGen) Options (Continued)
Pins/Function
Affected
Values
(default)
Option Name
Description
DonePin
DONE pin
Pullup
Internally connects a pull-up resistor between DONE pin and VCCAUX. An external
330 Ω pull-up resistor to VCCAUX is still recommended.
Pullnone No internal pull-up resistor on DONE pin. An external 330 Ω pull-up resistor to VCCAUX
is required.
DriveDone
DonePipe
ProgPin
DONE pin
No
When configuration completes, the DONE pin stops driving Low and relies on an
external 330 Ω pull-up resistor to VCCAUX for a valid logic High.
Yes
When configuration completes, the DONE pin actively drives High. When using this
option, an external pull-up resistor is no longer required. Only one device in an FPGA
daisy-chain should use this setting.
DONE pin
No
The input path from DONE pin input back to the Startup sequencer is not pipelined.
Yes
This option adds a pipeline register stage between the DONE pin input and the Startup
sequencer. Used for high-speed daisy-chain configurations when DONE cannot rise in
a single CCLK cycle. Releases GWE and GTS signals on the first rising edge of
StartupClk after the DONE pin input goes High.
PROG_B pin
Pullup
Internally connects a pull-up resistor or between PROG_B pin and VCCAUX. An
external 4.7 kΩ pull-up resistor to VCCAUX is still recommended since the internal
pull-up value may be weaker (see Table 78).
Pullnone No internal pull-up resistor on PROG_B pin. An external 4.7 kΩ pull-up resistor to
VCCAUX is required.
TckPin
TdiPin
TdoPin
TmsPin
JTAG TCK pin
JTAG TDI pin
JTAG TDO pin
JTAG TMS pin
Pullup
Internally connects a pull-up resistor between JTAG TCK pin and VCCAUX.
Pulldown Internally connects a pull-down resistor between JTAG TCK pin and GND.
Pullnone No internal pull-up resistor on JTAG TCK pin.
Pullup
Internally connects a pull-up resistor between JTAG TDI pin and VCCAUX.
Pulldown Internally connects a pull-down resistor between JTAG TDI pin and GND.
Pullnone No internal pull-up resistor on JTAG TDI pin.
Pullup
Internally connects a pull-up resistor between JTAG TDO pin and VCCAUX.
Pulldown Internally connects a pull-down resistor between JTAG TDO pin and GND.
Pullnone No internal pull-up resistor on JTAG TDO pin.
Pullup
Internally connects a pull-up resistor between JTAG TMS pin and VCCAUX.
Pulldown Internally connects a pull-down resistor between JTAG TMS pin and GND.
Pullnone No internal pull-up resistor on JTAG TMS pin.
UserID
JTAG User ID
register
User
string
The 32-bit JTAG User ID register value is loaded during configuration. The default
value is all ones, 0xFFFF_FFFF hexadecimal. To specify another value, enter an
8-character hexadecimal value.
Security
JTAG,
SelectMAP,
Readback,
Partial
None
Level1
Level2
Readback and limited partial reconfiguration are available via the JTAG port or via the
SelectMAP interface, if the Persist option is set to Yes.
Readback function is disabled. Limited partial reconfiguration is still available via the
JTAG port or via the SelectMAP interface, if the Persist option is set to Yes.
reconfiguration
Readback function is disabled. Limited partial reconfiguration is disabled.
110
www.xilinx.com
DS312-2 (v3.8) August 26, 2009
Product Specification
XILINX [ XILINX, INC ]
