R
Functional Description
Readback
FPGA configuration data can be read back using either the
Slave Parallel or JTAG mode. This function is disabled if the
Bitstream Generator Security option is set to either Level1
or Level2.
The Xilinx iMPACT programming software uses the Read-
back feature for its optional Verify and Readback opera-
tions. The Xilinx ChipScope™ software presently does not
use Readback but may in future updates.
Along with the configuration data, it is possible to read back
the contents of all registers and distributed RAM.
Table 68: Readback Support in Spartan-3E FPGAs
Temperature Range
Speed Grade
Commercial
Industrial
-4
To synchronously control when register values are captured
for readback, use the CAPTURE_SPARTAN3 library primi-
tive, which applies for both Spartan-3 and Spartan-3E
FPGA families.
-4
-5
Block RAM Readback
All Spartan-3E
FPGAs
No
Yes
Yes
The Readback feature is available in most Spartan-3E
FPGA product options, as indicated in Table 68. The Read-
back feature is not available in the XC3S1200E and
XC3S1600E FPGAs when using the -4 speed grade in the
Commercial temperature grade. Similarly, block RAM Read-
back support is not available in the -4 speed grade, Com-
mercial temperature devices. If Readback is required in an
XC3S1200E or XC3S1600E FPGA, or if block RAM Read-
back is required on any Spartan-3E FPGA, upgrade to
either the Industrial temperature grade version or the -5
speed grade.
General Readback (registers, distributed RAM)
XC3S100E
XC3S250E
XC3S500E
XC3S1200E
XC3S1600E
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
108
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DS312-2 (v3.8) August 26, 2009
Product Specification
XILINX [ XILINX, INC ]
