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DS162 参数 Datasheet PDF下载

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型号: DS162
PDF下载: 下载PDF文件 查看货源
内容描述: 的Spartan- 6 FPGA数据手册:直流和开关特性 [Spartan-6 FPGA Data Sheet: DC and Switching Characteristics]
分类和应用: 开关
文件页数/大小: 73 页 / 2555 K
品牌: XILINX [ XILINX, INC ]
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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics  
Description of Revisions  
Date  
Version  
06/14/10  
1.5  
In Table 2, added note 5 and added temperature range to VFS and RFUSE. Removed speed grade  
delineation, revised IRPD description, and updated note 2 in Table 4. Added note 2 to Table 7. Added  
DIFF_MOBILE_DDR to Table 8 and Table 10. Added note 4 to Table 15. Changed minimum DVPPIN in  
Table 16. Updated FGTPDRPCLK in Table 19. Increased maximum TLLSKEW in Table 22. Updated  
descriptions and added data to Table 23. Removed note 1 and added new data to the Networking  
Applications section in Table 25. Updated Table 26 and Table 27 to the data in ISE v12.1 software with  
speed specification v1.08. In Table 28, added DIFF_MOBILE_DDR and updated -4 speed grade data.  
Updated the maximum I/O pairs per bank in Table 32. Updated note 2 on Table 38. Revised the FMAX  
in Table 43. In Table 46, updated description for TSMCKCSO, revised values for TPOR and added Min  
value, added TBPIICCK and TSPIICCK. Also in Table 46, added device dependencies to FSMCCK and  
FRBCCK. Updated and added data to Table 61 through Table 75, and Table 78. In Table 76, added data  
on the XC6SLX45-FG(G)676 and revised the XC6SLX45T and XC6SLX150T values.  
The following changes to this specification are addressed in the product change notice  
XCN10024, MCB Performance and JTAG Revision Code for Spartan-6 LX16 and LX45 FPGAs.  
In Table 2, revised the VCCINT to add the memory controller block extended performance  
specifications. In Table 25, changed the standard specifications and added extended performance  
specifications for the memory controller block and note 2. Added Note 4 and updated values in  
Table 33.  
06/24/10  
1.6  
Production release of XC6SLX45T (-2 and -3 speed grades), XC6SLX16 and XC6SLX45 (-3 speed  
grade) devices which includes changes to Table 26 and Table 27 (ISE v12.1 software with speed  
specification v1.08).  
Added the -3N speed grade, which designates Spartan-6 devices that do not support MCB functionality  
(specifications are identical to the -3 speed grade). This includes changes to Table 2 (note 2), Table 25  
(note 4), and Switching Characteristics (Table 26).  
Updated Simultaneously Switching Outputs discussion. Added -3 speed grade values for TTAP and  
FMINCAL values in Table 38. In Table 39, updated TRPW (-2 and -3 speed grade) values and FTOG (-3  
speed grade) values. In Table 47, updated TGIO (-2 and -3 speed grade) values. Updated -3 values in  
spread spectrum section of Table 55.  
07/16/10  
07/26/10  
1.7  
1.8  
Production release of specific devices listed in Table 26 and Table 27 using ISE v12.2 software with  
speed specification v1.11. Added Note 3 advising designers of the patch which contains v1.11. Also  
updated the -1L speed specification to v1.04. Updated numerous -4 and -1L values. Added -4 TTAP  
values and FMINCAL to Table 38. Revised TCINCK/TCKCIN in Table 39. In Table 40, revised TSHCKO. In  
Table 41, revised TREG. Added new -1L values to Table 46. Added and updated values in Table 76.  
Production release of XC6SLX25, XC6SLX25T, XC6SLX100 and XC6SLX100T in the specific speed  
grades listed in Table 26 and Table 27 using ISE v12.2 software with speed specification v1.11. Added  
note 7 to Table 2 and moved VFS and RFUSE to a new Table 3. Added IHS and Note 4 to Table 4. Added  
note 1 to Table 28. Added and updated SSO limits per VCCO/GND pairs in Table 33. Added note 3 to  
Table 46. In Table 52, removed -1L specifications for CLKOUT_PER_JITT_DV1/2 and revised  
CLKIN_CLKFB_PHASE and CLKOUT_PHASE_DLL values. Updated note 3 in both Table 54 and  
Table 55.  
08/23/10  
1.9  
Updated values for FGTPRANGE1, FGTPRANGE2, and FGPLLMIN in Table 18. Revised -3 and -4 values in  
Table 21. Removed the -1L speed grade readback support restriction and Note 3 in Table 46.  
Notice of Disclaimer  
THE XILINX HARDWARE FPGA AND CPLD DEVICES REFERRED TO HEREIN (“PRODUCTS”) ARE SUBJECT TO THE TERMS AND  
CONDITIONS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED AT http://www.xilinx.com/warranty.htm. THIS LIMITED  
WARRANTY DOES NOT EXTEND TO ANY USE OF PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE  
SPECIFICATIONS STATED IN THE XILINX DATA SHEET. ALL SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.  
PRODUCTS ARE NOT DESIGNED OR INTENDED TO BE FAIL-SAFE OR FOR USE IN ANY APPLICATION REQUIRING FAIL-SAFE  
PERFORMANCE, SUCH AS LIFE-SUPPORT OR SAFETY DEVICES OR SYSTEMS, OR ANY OTHER APPLICATION THAT INVOKES  
THE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). USE OF PRODUCTS IN CRITICAL APPLICATIONS IS AT THE SOLE RISK OF CUSTOMER, SUBJECT TO  
APPLICABLE LAWS AND REGULATIONS.  
DS162 (v1.9) August 23, 2010  
www.xilinx.com  
Advance Product Specification  
73  
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