R
Virtex-II Platform FPGAs: Pinout Information
Table 9: BG575/BGG575 BGA — XC2V1000, XC2V1500, and XC2V2000
Bank
Pin Description
IO_L91N_6
Pin Number No Connect in XC2V1000 No Connect in XC2V1500
6
6
6
6
6
6
6
P4
N4
N3
N6
N5
N8
N7
IO_L93P_6
IO_L93N_6/VREF_6
IO_L94P_6
IO_L94N_6
IO_L96P_6
IO_L96N_6
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
IO_L96P_7
IO_L96N_7
IO_L94P_7
N2
M1
M2
M3
M4
M5
M6
M7
IO_L94N_7
IO_L93P_7/VREF_7
IO_L93N_7
IO_L91P_7
IO_L91N_7
IO_L73P_7
M8
L8
L1
K1
K2
K3
L3
L4
L5
L7
J1
H1
J2
J3
J4
J5
K5
K6
F1
F2
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
IO_L73N_7
IO_L72P_7
IO_L72N_7
IO_L70P_7
IO_L70N_7
IO_L69P_7/VREF_7
IO_L69N_7
IO_L67P_7
IO_L67N_7
IO_L54P_7
IO_L54N_7
IO_L52P_7
IO_L52N_7
IO_L51P_7/VREF_7
IO_L51N_7
IO_L49P_7
IO_L49N_7
IO_L48P_7
IO_L48N_7
DS031-4 (v3.5) November 5, 2007
Product Specification
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