R
XC4000E and XC4000X Series Field Programmable Gate Arrays
There is an internal delay of 0.5 CCLK periods, which
means that DOUT changes on the falling CCLK edge, and
the next FPGA in the daisy chain accepts data on the sub-
sequent rising CCLK edge.
Configuration Timing
The seven configuration modes are discussed in detail in
this section. Timing specifications are included.
Figure 51 shows a full master/slave system. An XC4000
Series device in Slave Serial mode should be connected as
shown in the third device from the left.
Slave Serial Mode
In Slave Serial mode, an external signal drives the CCLK
input of the FPGA. The serial configuration bitstream must
be available at the DIN input of the lead FPGA a short
setup time before each rising CCLK edge.
Slave Serial mode is selected by a <111> on the mode pins
(M2, M1, M0). Slave Serial is the default mode if the mode
pins are left unconnected, as they have weak pull-up resis-
tors during configuration.
The lead FPGA then presents the preamble data—and all
data that overflows the lead device—on its DOUT pin.
NOTE:
NOTE:
M2, M1, M0 can be shorted
to VCC if not used as I/O
M2, M1, M0 can be shorted
to Ground if not used as I/O
VCC
4.7 KΩ
N/C
4.7 KΩ
4.7 KΩ
4.7 KΩ
4.7 KΩ
4.7 KΩ
M0 M1
M2
M0 M1
M2
M0 M1
M2
PWRDN
N/C
DOUT
DIN
DOUT
DIN
DOUT
CCLK
CCLK
VCC
XC4000E/X
MASTER
SERIAL
XC4000E/X,
XC1700D
+5 V
XC3100A
4.7 KΩ
XC5200
SLAVE
CCLK
CLK
VPP
CEO
SLAVE
DATA
DIN
LDC
INIT
CE
PROGRAM
DONE
PROGRAM
RESET
D/P
RESET/OE
DONE
INIT
INIT
(Low Reset Option Used)
PROGRAM
X9025
Figure 51: Master/Slave Serial Mode Circuit Diagram
DIN
Bit n
Bit n + 1
1
2
5
T
T
T
CCL
DCC
CCD
CCLK
4
3
T
T
CCH
CCO
DOUT
(Output)
Bit n - 1
Bit n
X5379
Description
DIN setup
Symbol
Min
20
0
Max
Units
1
2
3
4
5
TDCC
TCCD
TCCO
TCCH
TCCL
FCC
ns
ns
DIN hold
DIN to DOUT
High time
Low time
30
10
ns
CCLK
45
45
ns
ns
Frequency
MHz
Note: Configuration must be delayed until the INIT pins of all daisy-chained FPGAs are High.
Figure 52: Slave Serial Mode Programming Switching Characteristics
6-60
May 14, 1999 (Version 1.6)
XILINX [ XILINX, INC ]
