X1228
The control bits for this function are FO1 and FO0 and
are found in address 0011h of the Clock Control Mem-
ory map. See “Programmable Frequency Output
Bits—FO1, FO0” on page 14.
Reading the Real Time Clock
The RTC is read by initiating a Read command and
specifying the address corresponding to the register of
the Real Time Clock. The RTC Registers can then be
read in a Sequential Read Mode. Since the clock runs
continuously and a read takes a finite amount of time,
there is the possibility that the clock could change during
the course of a read operation. In this device, the time is
latched by the read command (falling edge of the clock on
the ACK bit prior to RTC data output) into a separate latch
to avoid time changes during the read operation. The
clock continues to run. Alarms occurring during a read
are unaffected by the read operation.
X1, X2
The X1 and X2 pins are the input and output,
respectively, of an inverting amplifier. An external
32.768kHz quartz crystal is used with the X1228 to
supply a timebase for the real time clock. The
recommended crystal is a Citizen CFS206-32.768KDZF.
Internal compensation circuitry is included to form a
complete oscillator circuit. Care should be taken in the
placement of the crystal and the layout of the circuit.
Plenty of ground plane around the device and short
traces to X1 and X2 are highly recommended. See
Application section for more recommendations.
Writing to the Real Time Clock
The time and date may be set by writing to the RTC
registers. To avoid changing the current time by an
uncompleted write operation, the current time value is
loaded into a separate buffer at the falling edge of the
clock on the ACK bit before the RTC data input bytes,
the clock continues to run. The new serial input data
replaces the values in the buffer. This new RTC value
is loaded back into the RTC Register by a stop bit at
the end of a valid write sequence. An invalid write oper-
ation aborts the time update procedure and the con-
tents of the buffer are discarded. After a valid write
operation the RTC will reflect the newly loaded data
beginning with the next “one second” clock cycle after
the stop bit is written. The RTC continues to update the
time while an RTC register write is in progress and the
RTC continues to run during any nonvolatile write
sequences. A single byte may be written to the RTC
without affecting the other bytes.
Figure 1. Recommended Crystal connection
X1
X2
POWER CONTROL OPERATION
The power control circuit accepts a V
and a V
BACK
CC
input. The power control circuit power the clock from
when V < V - 0.2V. It will switch back to
V
BACK
CC
BACK
power the device from V when V exceeds V .
CC
CC
BACK
Figure 2. Power Control
V
CC
Voltage
On
Accuracy of the Real Time Clock
V
BACK
In
Off
The accuracy of the Real Time Clock depends on the
frequency of the quartz crystal that is used as the time
base for the RTC. Since the resonant frequency of a
crystal is temperature dependent, the RTC perfor-
mance will also be dependent upon temperature. The
frequency deviation of the crystal is a fuction of the
turnover temperature of the crystal from the crystal’s
nominal frequency. For example, a >20ppm frequency
deviation translates into an accuracy of >1 minute per
month. These parameters are available from the
crystal manufacturer. Xicor’s RTC family provides on-
chip crystal compensation networks to adjust load-
capacitance to tune oscillator frequency from +116
ppm to –37 ppm when using a 12.5 pF load crystal. For
more detail information see the Application section.
REAL TIME CLOCK OPERATION
The Real Time Clock (RTC) uses an external
32.768kHz quartz crystal to maintain an accurate inter-
nal representation of the second, minute, hour, day,
date, month, and year. The RTC has leap-year correc-
tion. The clock also corrects for months having fewer
than 31 days and has a bit that controls 24 hour or AM/
PM format. When the X1228 powers up after the loss
of both V
and V
, the clock will not operate until
CC
BACK
at least one byte is written to the clock register.
Characteristics subject to change without notice. 10 of 31
REV 1.3 3/24/04
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