Production Data
WM9715L
Register 56h (together with register 4Ch) controls the outputs ADCIRQ, PENDOWN, GENIRQ and SPDIF_OUT.
REG
ADDR
BIT
LABEL
GE5
DEFAULT
1 (off)
DESCRIPTION
REFER TO
56h
5
4
3
2
‘0’ enables the SPDIF_OUT pin (note that GC5 in register 4Ch
must also be set to 0, and SEN in register 2Ah to 1)
Interrupt
Control
GE4
1 (off)
‘0’ enables the ADCIRQ pin (note that GC4 in register 4Ch must
also be set to 0).
GE3
1 (off)
‘0’ enables the PENDOWN pin (note that GC3 in register 4Ch
must also be set to 0).
GE2
1 (off)
‘0’ enables the GENIRQ pin (note that bit GC2 in register 4Ch
must also be set to 0).
Register 58h controls several additional functions.
REG
ADDR
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
Battery Alarm
58h
15:13
10
COMP2DEL
SVD
000 (no delay)
0 (enabled)
Selects Comparator 2 delay
Disables VREF for lowest possible power
consumption
Power Management
3:2
1
DIE REV
WAKEEN
IRQ INV
Indicates device revision. 00=Rev.A, 01=Rev.B, 10=Rev.C
N/A
0 (no wake-up)
0 (not inverted)
Enables GENIRQ interrupt wake-up
Inverts the GENIRQ signal (pin 45)
Interrupt Control
0
Register 5Ch controls several additional functions.
REG
ADDR
BIT
15
LABEL
DEFAULT
DESCRIPTION
REFER TO
5Ch
AMUTE
C1REF
C1SRC
C2REF
C2SRC
DS
0
Read-only bit to indicate DAC auto-muting
Selects Comparator 1 Reference Voltage
Selects Comparator 1 Signal Source
Selects Comparator 1 Reference Voltage
Selects Comparator 1 Signal Source
Audio DACs, Stereo DACs
Battery Alarm
14
0 (AVDD/2)
00 (OFF)
0 (AVDD/2)
00 (OFF)
0
13:12
11
10:9
8
Selects differential microphone input pins. 0=MIC1
and MIC2, 1=LINEL and LINER
Analogue Inputs,
Microphone Input
7
AMEN
VBIAS
0 (OFF)
00
Enables DAC Auto-Mute
6:5
Selects analogue bias for lowest power, depending
on AVDD supply. 0X=3.3V, 10=2.5V, 11=1.8V
Power Management
4
ADCO
0
Selects source of SPDIF data. 0=from SDATAOUT,
1= from audio ADC
Digital Audio (SPDIF)
Output
3
2
HPF
ENT
0
0
Disables ADC high-pass filter
Enables thermal sensor
Audio ADC
Analogue Audio Outputs,
Thermal Sensor
1:0
ASS
00
Selects time slots for stereo ADC data. 00=slots 3
and 4, 01=7/8, 10=6/9, 11=10/11
Audio ADC, ADC Slot
Mapping
PD Rev 4.0 December 2007
69
w