WM9715L
Production Data
Register 3Ah controls the SPDIF output.
REG
ADDR
BIT
15
LABEL
DEFAULT
DESCRIPTION
REFER TO
3Ah
V
0
0
Validity bit; ‘0’ indicates frame valid, ‘1’ indicates frame not Digital Audio
valid
(SPDIF)
Output
14
DRS
Indicates that the WM9715L does not support double rate
SPDIF output (read-only)
13:12
SPSR
10
Indicates that the WM9715L only supports 48kHz
sampling on the SPDIF output (read-only)
11
10:4
3
L
0
Generation level; programmed as required by user
Category code; programmed as required by user
CC
PRE
0000000
0
Pre-emphasis; ‘0’ indicates no pre-emphasis, ‘1’ indicates
50/15us pre-emphasis
2
1
0
COPY
AUDIB
PRO
0
0
0
Copyright; ‘0’ indicates copyright is not asserted, ‘1’
indicates copyright
Non-audio; ‘0’ indicates data is PCM, ‘1’ indicates non-
PCM format (e.g. DD or DTS)
Professional; ‘0’ indicates consumer, ‘1’ indicates
professional
Register 4Ch (together with register 56h) controls the outputs ADCIRQ, PENDOWN, GENIRQ and SPDIF_OUT.
REG
ADDR
BIT
LABEL
GC5
DEFAULT
1 (off)
DESCRIPTION
REFER TO
4Ch
5
4
3
2
‘0’ enables the SPDIF_OUT pin (note that GE5 in register 56h
must also be set to 0, and SEN in register 2Ah to 1)
Interrupt
Control
GC4
1 (off)
‘0’ enables the ADCIRQ pin (note that GE4 in register 4Ch must
also be set to 0).
GC3
1 (off)
‘0’ enables the PENDOWN pin (note that GE3 in register 4Ch
must also be set to 0).
GC2
1 (off)
‘0’ enables the GENIRQ pin (note that GE2 in register 4Ch must
also be set to 0).
Register 4Eh to 54h control the processing of GENIRQ interrupt signals.
REG
ADDR
BIT
LABEL
DEFAULT
all 1
DESCRIPTION
Controls interrupt polarity
REFER TO
4Eh
50h
52h
54h
Interrupt
Control
all 0 (not sticky)
all 0 (OFF)
Makes interrupt bits sticky
Enables wake-up for each interrupt
= status of
internal interrupt
signal
Interrupt status (read from inputs, write ‘0’ to clear sticky bits)
please
refer to
the
register
map
15
14
13
12
11
Controls Comparator 1 interrupts
Controls Comparator 2 interrupts
Controls Pen-Down interrupts
Controls AUXADC data available interrupts
Controls Thermal sensor interrupts
PD Rev 4.0 December 2007
68
w