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WM9715LGEFL/RV 参数 Datasheet PDF下载

WM9715LGEFL/RV图片预览
型号: WM9715LGEFL/RV
PDF下载: 下载PDF文件 查看货源
内容描述: AC'97音频和触摸屏CODEC [AC’97 Audio and Touchpanel CODEC]
分类和应用:
文件页数/大小: 77 页 / 900 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM9715L  
Production Data  
LOW POWER STANDBY MODE  
If all the bits in registers 26h and 24h are set, then the WM9715L is in low-power standby mode and  
consumes very little current. A 1Mresistor string remains connected across AVDD to generate  
VREF. This is necessary if the on-chip analogue comparators are used (see “Battery Alarm and  
Battery Measurement” section), and helps shorten the delay between wake-up and playback  
readiness. If VREF is not required, the 1Mresistor string can be disabled by setting the SVD bit,  
reducing current consumption further.  
REGISTER  
ADDRESS  
BIT  
10  
LABEL  
DEFAULT  
DESCRIPTION  
58h  
SVD  
0
VREF Disable  
0: VREF enabled using 1Mstring (low-power  
standby mode)  
1 : VREF disabled, 1Mstring disconnected  
(OFF mode)  
Table 41 Disabling VREF (for lowest possible power consumption)  
SAVING POWER AT LOW SUPPLY VOLTAGES  
The analogue supplies to the WM9715L can run from 1.8V to 3.6V. By default, all analogue circuitry  
on the IC is optimized to run at 3.3V. This set-up is also good for all other supply voltages down to  
1.8V. However, at lower voltages, it is possible to save power by reducing the internal bias currents  
used in the analogue circuitry. This is controlled as shown below.  
REGISTER  
ADDRESS  
BIT  
6:5  
LABEL  
DEFAULT  
DESCRIPTION  
5Ch  
VBIAS  
00  
Analogue Bias optimization  
11 : Lowest bias current, optimized for 1.8V  
10 : Low bias current, optimized for 2.5V  
01, 00 : Default bias current, optimized for 3.3V  
Table 42 Analogue Bias Selection  
PD Rev 4.0 December 2007  
56  
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