WM9715L
Production Data
transmitted through the GENIRQ pin if the dedicated interrupt pins cannot be used (e.g. if there are
insufficient pins available on the host processor).
The GENIRQ output is enabled using registers 56h and 4Ch. Its polarity can be controlled using the
IRQINV bit in register 58h, and interrupt wake-up (i.e. re-activating the AC-Link when an interrupt
occurs after the WM9715L has been put into sleep mode, see “Power Management”) is enabled by
the WAKEEN bit in register 58h.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
4Ch
56h
2
GC2
GE2
1
1
GENIRQ output enable
GENIRQ is enabled when both GC4 and GE4 are
set to ‘0’.
2
To disable GENIRQ, set both bits to ‘1’.
Other combinations (0/1, 1/0) are reserved.
Inverts the GENIRQ signal (pin 45)
0: GENIRQ signal not inverted
1: GENIRQ signal inverted
58h
0
1
IRQINV
0
0
Additional
Functional
Control
WAKE
EN
Enables WM9715L wake-up on interrupt
0: Disabled
1: Enabled
Table 36 Controlling the GENIRQ pin
The global interrupt signal GENIRQ is a logical OR of selected internal interrupts, each of which may
have its polarity inverted and/or go through a “sticky” circuit if desired. This is illustrated below.
Figure 15 Interrupt Logic Equivalent Circuit
Each GENIRQ interrupt source has an associated bit in register 54h for readback.
INTERRUPT
SOURCE
REG 54H
BIT
DESCRIPTION
Thermal Cutout (T)
11
Internal thermal cutout signal, indicates when internal
temperature reaches approximately 150°C (see “Thermal
Sensor”)
AUXADC Data
Available (A)
12
13
14
15
Internal ADA (ADC Data Available) Signal
enabled only when auxiliary ADC is active
Internal PENDOWN Signal
Pen-down (P)
COMP2 (C2)
COMP1 (C1)
enabled only when pen-down detection is active
Internal COMP2 output (Low Battery Alarm)
enabled only when COMP2 is on
Internal COMP1 output (Dead Battery Alarm)
enabled only when COMP1 is on
Table 37 Interrupt Sources
PD Rev 4.0 December 2007
52
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
