WM9715L
Production Data
POWER MANAGEMENT
The WM9715L includes the standard power down control register defined by the AC’97 specification
(register 26h). Additionally, it also allows more specific control over the individual blocks of the device
through register 24h. Each particular circuit block is active when both the relevant bit in register 26h
AND the relevant bit in register 24h are set to ‘0’.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
NORMAL PWRUP PIN
‘HI’ DURING
RESET
26h
14
PR6
0 (ON)
1 (OFF)
Disables HPOUTL, HPOUTR and
OUT3 Buffer
Powerdown/
Status
register
13
12
PR5
PR4
0 (ON)
0 (ON)
1 (OFF)
1 (OFF)
Disables internal clock
Disables AC-link interface
(external clock off)
11
10
PR3
PR2
0 (ON)
0 (ON)
1 (OFF)
1 (OFF)
Disables VREF, analogue mixers
and outputs
Disables analogue mixers,
LOUT2, ROUT2 (but not VREF)
9
8
PR1
PR0
0 (ON)
0 (ON)
1 (OFF)
1 (OFF)
Disables stereo DAC
Disables audio ADCs and input
Mux
3
2
1
0
REF
ANL
DAC
ADC
1
1
1
1
0
0
0
0
Read-only bit, indicates VREF is
ready (inverse of PR2)
Read-only bit, indicates analogue
mixers are ready (inverse of PR3)
Read-only bit, indicates audio
DACs are ready (inverse of PR1)
Read-only bit, indicates audio
ADCs are ready (inverse of PR0)
Table 39 Powerdown and Status Register (Conforms to AC’97 Rev 2.2)
POWER-UP
As can be seen from the table above, most blocks are ‘ON’ by default. However, if the PWRUP pin is
held high during reset, the WM9715L starts up with all blocks powered down, saving power. This is
achieved by connecting a pull-up resistor (e.g. 100kΩ) from PWRUP to DBVDD. Note that the state
of PWRUP during reset only affects register 26h.
PD Rev 4.0 December 2007
54
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
