WM8985
Pre-Production
ENABLING THE OUTPUTS
Each analogue output of the WM8985 can be independently enabled or disabled. The analogue
mixer associated with each output has a separate enable bit. All outputs are disabled by default. To
save power, unused parts of the WM8985 should remain disabled.
Outputs can be enabled at any time, but it is not recommended to do so when BUFIO is disabled
(BUFIOEN=0), as this may cause pop noise (see “Power Management” and “Applications
Information” sections).
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1 (01h)
2
BUFIOEN
0
0
0
Unused input/output bias buffer enable
OUT3 mixer enable
Power
Management
1
6
7
OUT3MIXEN
OUT4MIXEN
OUT4 mixer enable
R2 (02h)
8
7
6
ROUT1EN
LOUT1EN
SLEEP
0
0
0
ROUT1 output enable
LOUT1 output enable
Power
Management
2
0 = Normal device operation
1 = Supply current reduced in device
standby mode when clock supplied
R3 (03h)
2
3
5
6
7
8
LMIXEN
0
0
0
0
0
0
Left mixer enable
Right mixer enable
LOUT2 output enable
ROUT2 output enable
OUT3 enable
Power
Management
3
RMIXEN
LOUT2EN
ROUT2EN
OUT3EN
OUT4EN
OUT4 enable
Note: All “Enable” bits are 1 = ON, 0 = OFF
Table 39 Output Stages Power Management Control
THERMAL SHUTDOWN
To protect the WM8985 from becoming too hot, a thermal sensor has been built in. If the device
junction temperature reaches approximately 125°C and the TSDEN and TSOPCTRL bit are set, then
all outputs will be disabled to avoid further increase of the chip temperature.
Additionally, when the device is too hot and TSDEN is set, then the WM8985 de-asserts GPIO bit
11, a virtual GPIO that can be set up to generate an interrupt to the CPU (see “GPIO and Interrupt
Control” section).
REGISTER
ADDRESS
BIT
LABEL
TSDEN
DEFAULT
DESCRIPTION
R49 (31h)
1
0
Thermal Sensor Enable
Output Control
0 = disabled
1 = enabled
2
TSOPCTRL
0
Thermal Shutdown Output enable
0 = Disabled
1 = Enabled, i.e. all outputs will be
disabled if TI set and the device junction
temperature is more than 125ºC.
Table 40 Thermal Shutdown
UNUSED ANALOGUE INPUTS/OUTPUTS
Whenever an analogue input/output is disabled, it remains connected to a voltage source (AVDD1/2)
through a resistor. This helps to prevent pop noise when the output is re-enabled. The resistance
between the voltage buffer and the output pins can be controlled using the VROI control bit. The
default impedance is low, so that any capacitors on the outputs can charge up quickly at start-up. If
a high impedance is desired for disabled outputs, VROI can then be set to 1, increasing the
resistance to about 30kΩ.
PP, Rev 3.4, October 2006
72
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
