WM8961
Pre-Production
REGISTER
ADDRESS
BIT
2:0
LABEL
DEFAULT
DESCRIPTION
Headphone PGA bias options
R68 (44h)
Analogue
PGA Bias
HP_PGAS_BIAS[2:0]
011
000
x 2
001
010
011
Reserved
Reserved
x 1
100-111
Reserved
Register 44h Analogue PGA Bias
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Left channel output short removal: set after output stage has been
enabled
R69 (45h)
Analogue
HP 0
7
HPL_RMV_SHORT
0
Enables left channel output stage; set after offset cancellation is done
6
5
HPL_ENA_OUTP
HPL_ENA_DLY
0
0
delayed left channel enable, set with at least 20us delay to
HPL_ENA; reset together with HPL_ENA
enables left headphone amplifier. Channel
4
3
HPL_ENA
0
0
right channel output short removal: set after output stage has been
enabled
HPR_RMV_SHORT
enables right channel output stage; set after offset cancellation is
done
2
1
0
HPR_ENA_OUTP
HPR_ENA_DLY
HPR_ENA
0
0
0
delayed right channel enable, set with at least 20us delay to
HPR_ENA; reset together with HPR_ENA
enables right headphone amplifier. Channel
Register 45h Analogue HP 0
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R72 (48h)
Charge
0
CP_ENA
0
Enable charge-pump digits
0: disable
Pump 1
1: enable
Register 48h Charge Pump 1
PP, August 2009, Rev 3.1
w
97
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
