WM8961
Pre-Production
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
The Delay to be inserted between the current write taking place and
the next write taking place.
R92 (5Ch)
Write
3:0
WSEQ_DELAY[3:0]
0000
0000 : 0s
Sequencer 6
0001 : 125us
0010 : 250us
0011 : 500us
0100 : 1 ms
0101 : 2ms
0110 : 4ms
0111 : 8ms
1000 : 16ms
1001 : 32ms
1010 : 64ms
1011 : 128ms
1100 : 256ms
1101 : 512ms
1110 : 1.024s
1111 : 2.048s
Register 5Ch Write Sequencer 6
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
Read-only Register to give Write Sequencer Status.
0: write sequencer idle, control interface is fully active
1: write sequencer busy, control interface is blocked.
R93 (5Dh)
Write
Sequencer 7
0
WSEQ_BUSY
0
Register 5Dh Write Sequencer 7
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R252 (FCh)
General test
1
1
ARA_ENA
AUTO_INC
0
Alert Response Address Enable
0 : off
1 : on
0
1
Enable Auto-Increment
0 : off
1 : on
Register FCh General Test 1
PP, August 2009, Rev 3.1
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