WM8941
Pre Production
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
00h
DESCRIPTION
REFER TO
3 (03h)
15:8
7
Reserved
MONOEN
0
0
0
MONOOUT enable
0 = disabled
Analogue Outputs
Analogue Outputs
Analogue Outputs
1 = enabled
6
5
SPKNEN
SPKPEN
SPKOUTN enable
0 = disabled
1 = enabled
SPKOUTP enable
0 = disabled
1 = enabled
4
3
VBUFEN
0
0
Video Buffer Enable
0 = disabled
Video Buffer
1 = enabled
MONOMIXEN
Mono Mixer Enable
0 = disabled
Analogue Outputs
1 = enabled
2
SPKMIXEN
DACEN
0
Speaker Mixer Enable
0 = disabled
Analogue Outputs
Analogue Outputs
1 = enabled
1
0
0
0
Reserved
DAC enable
0 = DAC disabled
1 = DAC enabled
Reserved
4 (04h)
15:10
9
000000
0
LOUTR
LOUTR control
0=normal
Digital Audio
Interfaces
1=Input mono channel data output on left and right
channels
8
7
BCP
0
0
BCLK polarity
0=normal
Digital Audio
Interfaces
1=inverted
FRAMEP
Frame clock polarity
0=normal
Digital Audio
Interfaces
1=inverted
DSP Mode control
1 = Configures the interface so that MSB is available
on 1st BCLK rising edge after FRAME rising edge
0 = Configures the interface so that MSB is available
on 2nd BCLK rising edge after FRAME rising edge
6:5
4:3
2
WL
10
10
0
Word length
Digital Audio
Interfaces
00=16 bits
01=20 bits
10=24 bits
11=32 bits
FMT
Audio interface Data Format Select:
00=Right Justified
01=Left Justified
10=I2S format
Digital Audio
Interfaces
11= DSP/PCM mode
DLRSWAP
Controls whether DAC data appears in ‘right’ or ‘left’
phases of FRAME clock:
Digital Audio
Interfaces
0=DAC data appear in ‘left’ phase of FRAME
1=DAC data appears in ‘right’ phase of FRAME
PP, Rev 3.3, December 2007
78
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
