WM8941
Pre Production
POWER MANAGEMENT
VMID
The analogue circuitry will not work when VMID is disabled (VMIDSEL[1:0] = 00b). The impedance
of the VMID resistor string, together with the decoupling capacitor on the VMID pin will determine the
start-up time of the VMID circuit.
REGISTER
ADDRESS
BIT
1:0
LABEL
DEFAULT
DESCRIPTION
R1
VMIDSEL 00
Reference string impedance to VMID pin
(determines startup time):
Power
management 1
00=off (open circuit)
01=50kΩ
10=250kΩ
11=5kΩ (for fastest startup)
Table 58 VMID Impedance Control
BIASEN
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R1
3
BIASEN
0
Analogue amplifier bias control
0=Disabled
Power
management 1
1=Enabled
Table 59 BIASEN Control
ESTIMATED SUPPLY CURRENTS
When either the DAC or ADC are enabled it is estimated that approximately 4mA will be drawn from
DVDD when fs=48kHz (This will be lower at lower sample rates). When the PLL is enabled an
additional 700 microamps will be drawn from DVDD.
Table 60 shows the estimated 3.3V AVDD current drawn by various circuits, by register bit.
REGISTER BIT
MONOEN
PLLEN
AVDD CURRENT (MILLIAMPS)
0.2mA
1.4mA (with clocks applied)
MICBEN
0.5mA
BIASEN
0.3mA
BUFIOEN
VMIDSEL
BOOSTEN
INPPGAEN
ADCEN
0.1mA
5K=>0.3mA, less than 0.1mA for 50k/250k
0.2mA
0.2mA
2.6mA
MONOEN
SPKPEN
0.2mA
1mA from SPKVDD
1mA from SPKVDD
0.2mA
SPKNEN
MONOMIXEN
SPKMIXEN
DACEN
0.2mA
1.8mA
Table 60 AVDD Supply Current
PP, Rev 3.3, December 2007
74
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
