Pre Production
WM8941
Notes:
1. This step enables the internal device bias buffer and the VMID buffer for unassigned
inputs/outputs. This will provide a startup reference for all inputs and outputs. This will cause the
inputs and outputs to ramp towards VMID in a way that is controlled and predictable.
2. Choose the value of VMIDSEL bits based on the startup time (VMIDSEL = 10 for the slowest
startup, VMIDSEL = 11 for the fastest startup). Startup time is defined by the value of the
VMIDSEL bits (the reference impedance) and the external decoupling capacitor on VMID.
In addition to the power on sequence, it is recommended that the zero cross functions are used
when changing the volume in the PGAs to avoid any audible pops and clicks.
PP, Rev 3.3, December 2007
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