Pre Production
WM8941
REGISTER
ADDRESS
BIT
LABEL
LOUTR
DEFAULT
DESCRIPTION
R4
9
0
LOUTR control
0=normal
Audio interface
control
1=Input mono channel data output on
both left and right channels
8
7
BCP
0
0
BCLK polarity
0=normal
1=inverted
FRAMEP
Frame clock polarity (for RJ, LJ and I2S
formats)
0=normal
1=inverted
DSP Mode control
1 = Configures interface so that MSB is
available on 1st BCLK rising edge after
FRAME rising edge
0 = Configures interface so that MSB is
available on 2nd BCLK rising edge after
FRAME rising edge
6:5
4:3
2
WL
10
10
0
Word length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits (see note)
Audio interface Data Format Select:
00=Right Justified
01=Left Justified
10=I2S format
FMT
11= DSP/PCM mode
DLRSWAP
Controls whether DAC data appears in
‘right’ or ‘left’ phases of FRAME clock:
0=DAC data appear in ‘left’ phase of
FRAME
1=DAC data appears in ‘right’ phase of
FRAME
1
5
ALRSWAP
0
0
Controls whether ADC data appears in
‘right’ or ‘left’ phases of FRAME clock:
0=ADC data appear in ‘left’ phase of
FRAME
1=ADC data appears in ‘right’ phase of
FRAME
R5
WL8
8 Bit Word Length Enable
Companding
Control
Only recommended for use with
companding
0=Word Length controlled by WL
1=8 bits
Table 44 Audio Interface Control
Note: Right Justified Mode will only operate with a maximum of 24 bits. If 32-bit mode is selected the
device will operate in 24-bit mode.
PP, Rev 3.3, December 2007
61
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
