WM8941
Pre Production
Figure 36 DSP/PCM Mode Audio Interface (Mode A, FRAMEP=0)
1/fs
1 BCLK
1 BCLK
LRC
falling edge can occur anywhere in this area
BCLK
RIGHT CHANNEL
LEFT CHANNEL
DACDAT /
ADCDAT
1
2
3
n
1
2
3
n-2 n-1
n
n-2 n-1
MSB
LSB
Input Word Length (WL)
Figure 37 DSP/PCM Mode Audio Interface (Mode B, FRAMEP=1)
AUDIO INTERFACE CONTROL
The register bits controlling audio format, word length and master / slave mode are summarised
below.
Register bit MS selects audio interface operation in master or slave mode. In Master mode BCLK,
and FRAME are outputs. The frequency of BCLK and FRAME in master mode are controlled with
BCLKDIV. These are divided down versions of master clock. This may result in short BCLK pulses
at the end of a frame if there is a non-integer ratio of BCLKs to FRAME clocks.
PP, Rev 3.3, December 2007
60
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
