Pre-Production
WM8850
S/PDIF TRANSMIT
S/PDIF Transmit functionality is supported using the SPDIFOUT1 pin; this provides an IEC-60958-3
compatible S/PDIF output through the S/PDIF Tx 1 node. An on-chip, fully-asynchronous sample rate
coverter (SRC2) provides the flexibility to generate any supported outgoing S/PDIF rate from any
supported HDA link rate if required.
S/PDIF Transmit functionality is also supported using the SPDIFOUT2 pin; this provides an IEC-
60958-3 compatible S/PDIF output through the S/PDIF Tx 2 node. Note that there is no SRC
associated with S/PDIF Tx 2.
It is possible to configure either of the S/PDIF outputs to select the ADC1, MIC1, MIC2 or S/PDIF In
nodes as the data source. These signal paths are enabled using vendor-specific verbs, and are
illustrated by dotted lines in Figure 18.
Both S/PDIF transmitters allow control over the channel status information.
Note that the SPDIFOUT2 pin also supports the DMICDAT2 function, which is described in the
“Digital Microphone Record” section.
The WM8850 nodes associated with this function are shown in Figure 18.
Figure 18 S/PDIF Transmit Paths
This section provides a summary of the S/PDIF Tx 1, S/PDIF Tx 2 and S/PDIF Out nodes, and
describes the vendor-specific verb functions associated with each.
The Port-H node is described in the “Digital Microphone Record” section.
PP, April 2011, Rev 3.2
65
w