WM8802
Product Preview
OUTPUT CLOCKS BLOCK DIAGRAM (RMCK, RBCK, RLRCK, SBCK, SLRCK,
XMCK)
The relationships between the output clock and switch function are shown below.
Master Clock Generator in the figure indicates the PLL source, TMCK source or the XIN source.
The contents in the square brackets [ ] of the switch function blocks correspond to the write
command names.
The broken lines connecting the switches indicate coordinated switching.
Lock/Unlock switching is automatically performed through PLL locking/unlocking.
Master/slave switching is done through demodulation function master/slave function switching.
PP Rev 1.1 April 2004
18
w
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
