WM8774
Product Preview
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
00000
6:0
LA[6:0]
1111111
(0dB)
Attenuation data for Left channel DACL in 1dB steps. See Table
10
Analogue
Attenuation
DACL
7
8
LZCEN
0
DACL zero cross detect enable
0: zero cross disabled
1: zero cross enabled
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store DACL in intermediate latch (no change to output)
1: Store DACL and update attenuation on all channels.
00001
6:0
7
RA[6:0]
RZCEN
1111111
(0dB)
Attenuation data for Right channel DACR in 1dB steps. See Table
10
Analogue
Attenuation
DACR
0
DACR zero cross detect enable
0: zero cross disabled
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store DACR in intermediate latch (no change to output)
1: Store DACR and update attenuation on all channels.
Attenuation data for all DAC gains in 1dB steps. See Table 10
01000
6:0
7
MASTA[6:0]
MZCEN
1111111
(0dB)
0
Analogue
Master
Master zero cross detect enable
Attenuation
0: zero cross disabled
(both channels)
1: zero cross enabled
8
UPDATE
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store gains in intermediate latch (no change to output)
1: Store gains and update attenuation on all channels.
01001
7:0
8
LDA[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Left channel DACL in 0.5dB steps.
See Table 11
Digital
Attenuation
DACL
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store LDA in intermediate latch (no change to output)
1: Store LDA and update attenuation on all channels
01010
7:0
8
RDA[6:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for Right channel DACR in 0.5dB steps.
See Table 11
Digital
Attenuation
DACR
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store RDA in intermediate latch (no change to output)
1: Store RDA and update attenuation on all channels.
10001
7:0
8
MASTDA[7:0]
UPDATE
11111111
(0dB)
Digital Attenuation data for both DAC channels in 0.5dB steps.
See Table 11
Master
Digital
Attenuation
Not latched
Controls simultaneous update of all Attenuation Latches
0: Store gain in intermediate latch (no change to output)
1: Store gain and update attenuation on all channels.
Controls phase of DAC outputs
(both channels)
10010
1:0
PH
00
Phase swaps
0: Sets non inverted output phase
1: inverts phase of DAC output
PP Rev 1.0 June 2002
30
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
