Product Preview
WM8774
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
10011
0
DZCEN
0
DAC Digital Volume Zero Cross Enable:
0: Zero Cross detect disabled
DAC Control
1: Zero Cross detect enabled
ATC
IZD
0
0
Attenuator Control
1
2
0: All DACs use attenuations as programmed.
1: Right channel DACs use corresponding left DAC
attenuations
Infinite zero detection circuit control and automute control
0: Infinite zero detect automute disabled
1: Infinite zero detect automute enabled
DAC Analogue Zero cross detect timeout disable
0 : Timeout enabled
3
TOD
0
1: Timeout disabled
7:4
PL[3:0]
1001
DAC Output Control
PL[3:0]
Left
Right
PL[3:0]
Left
Right
Output
Output
Output
Output
0000
0001
0010
0011
0100
0101
0110
0111
Mute
Left
Mute
Mute
Mute
Mute
Left
1000
1001
1010
1011
1100
1101
1110
1111
Mute
Left
Right
Right
Right
(L+R)/2
Mute
Left
Right
(L+R)/2
Mute
Left
Right
Right
(L+R)/2
(L+R)/2
(L+R)/2
(L+R)/2
Left
Right
(L+R)/2
Left
Right
(L+R)/2
Left
10100
0
DMUTE
0
DAC channel soft mute enables:
0: mute disabled
DAC Mute
1: mute enabled
5
RECEN
DEEMP
FMT[1:0]
0
REC Output Enable
0 : REC output muted
1: REC output enabled
De-emphasis mode select:
0 : Normal Mode
10101
3:0
1:0
0
DAC Control
1: De-emphasis Mode
Interface format select
10
10110
00: right justified mode
01: left justified mode
10: I2S mode
Interface
Control
11: DSP mode
2
LRP
0
ADCLRC/DACLRC Polarity or DSP Early/Late mode select
Left Justified / Right Justified /
I2S
DSP Mode
0: Early DSP mode
1: Late DSP mode
0: Standard DACLRC Polarity
1: Inverted DACLRC Polarity
PP Rev 1.0 June 2002
31
ꢀꢀ