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REGISTER
WM8777
BIT
LABEL
DEFAULT
DESCRIPTION
ADDRESS
R65 (41h)
0
RX2DAC
0
Received S/PDIF PCM data to DAC.
Interface
Source
Select
0 = DAC1 takes data from Primary Audio Interface.
1 = DAC1 takes data from S/PDIF receiver.
Note: If DACs 2, 3 and 4 are disabled, DAC1 uses the
subframe rate of the S/PDIF input with respect to any
selected MCLK. PLL clock should be selected to set the
fs mode. If DAC 2, 3 or 4 are enabled, the user must
ensure that DACLRC and the S/PDIF subframe are
operating at the same rate; any difference will cause a
sample slip on DAC1.
S/PDIF Transmitter Data Source.
00 = S/PDIF received data.
2:1
TXSRC[1:0]
00
01 = ADC digital output data.
10 = Secondary Audio Interface received data
11 = DAC Audio Interface Received data.
Note: The output rate is determined by the source of the
data to be transmitted. The ADC outputs S/PDIF at a rate
determined by LRCLK.
PAIFSRC[1:0]
01
Audio Interface output source
5:4
00 = S/PDIF received data
01 = ADC digital output data
10 = Secondary Audio Interface received data
11 = Power-down Primary Audio Interface Transmitter
Note: for cases 00 and 10, the user must ensure that the
source rate matches the transmit rate; any difference will
cause samples to be lost. For optimum performance, the
PAIF should be operated in master mode, with the master
clock source the same as the PAIF source.
Secondary Audio Interface Transmitter Data Source.
00 = S/PDIF received data.
7:6
SAIFSRC[1:0]
00
01 = ADC digital output data.
10 = Power-down Secondary Audio Interface Transmitter
11 = Primary Audio Interface received data.
Note: for cases 00 and 10, the user must ensure that the
source rate matches the transmit rate; any difference will
cause samples to be lost. For case 01, if PAIFSRC is not
also 01, the ADC operation rate is set by the SLRC and
ADCCLKSRC/PLL2ADC register bits.
Table 10 Interface Output Selection Register
PP Rev 1.94 November 2004
23
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
