Production Data
WM8776
CONTROL INTERFACE TIMING – 2-WIRE MODE
t3
t3
t5
DI
t6
t4
t8
t2
CL
t7
t9
t1
Figure 7 Control Interface Timing – 2-Wire Serial Control Mode (MODE=0)
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless otherwise stated
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Program Register Input Information
CL Frequency
0
526
kHz
us
ns
ns
ns
ns
ns
ns
ns
ns
ns
CL Low Pulse-Width
t1
t2
t3
t4
t5
t6
t7
t8
t9
tps
1.3
600
600
600
100
CL High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
DI, CL Rise Time
300
300
DI, CL Fall Time
Setup Time (Stop Condition)
Data Hold Time
600
0
900
5
Pulse width of spikes that will be suppressed
Table 5 2-wire Control Interface Timing Information
PD Rev 4.0 April 2005
13
w