WM8771
Product Preview
Figure 21 shows the application and release of MUTE whilst a full amplitude sinusoid is being played
at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace) begins to
decay exponentially from the DC level of the last input sample. The output will decay towards VMID
with a time constant of approximately 64 input samples. If MUTE is applied to all channels for 1024
or more input samples the outputs will be connected directly to Vmid, if IZD is set. When MUTE is
de-asserted, the output will restart immediately from the current input sample.
Note that all other means of muting the DAC channels: setting the PL[3:0] bits to 0, setting the
PDWN bit or setting attenuation to 0 will cause much more abrupt muting of the output.
Each ADC channel also has an individual mute control bit, which mutes the input to the ADC. In
addition both channels may be muted by setting ADCMUTE.
REGISTER ADDRESS
BIT
7
LABEL
DEFAULT
0
DESCRIPTION
11001
ADCMUTE
ADC MUTE Left and Right
0 : Normal Operation
1: mute ADC left and ADC right
ADC Mute select
ADC Mute
11001
5
5
MUTE
MUTE
0
0
ADC Mute Left
0 : Normal Operation
1: mute ADC left
11010
ADC Mute select
ADC Mute Right
0 : Normal Operation
1: mute ADC right
The Record outputs may be enabled by setting RECEN[2:0], where RECEN[0] mutes the REC1L and
REC1R outputs, RECEN[1] mutes the REC2L and REC2R outputs and RECEN[2] mutes the REC3L
and REC3R outputs.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
000
DESCRIPTION
10100
[7:5] RECMUTE[2:0]
REC Output Enable
REC Enable
0 : REC output disabled
1: REC output enabled
DE-EMPHASIS MODE
A digital De-emphasis filter may be applied to each DAC channel. The De-emphasis filter for each
stereo channel is enabled under the control of DEEMP[3:0]. DEEMP[0] enables the de-emphasis
filter for channel 1, DEEMP[1] enables the de-emphasis filter for channel 2, DEEMP[2] enables the
de-emphasis filter for channel 3 and DEEMP[3] enables the de-emphasis filter for channel 4.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
0000
DESCRIPTION
10101
DAC De-emphasis
Control
[3:0] DEEMPH[3:0]
De-emphasis mode select:
0 : Normal Mode
1: De-emphasis Mode
Refer to Figure 29, Figure 30, Figure 31, Figure 32, Figure 33 and Figure 34 for details of the De-
Emphasis modes at different sample rates.
POWERDOWN MODE AND ADC/DAC DISABLE
Setting the PDWN register bit immediately powers down the WM8771. All trace of the previous input
samples are removed, but all control register settings are preserved. When PDWN is cleared the
digital filters will be reinitialised. . It is recommended that the 8-channel input mux and buffer, ADC,
DAC and output buffers are powered down before setting PDWN.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
PP Rev 2.0 December 2001
26
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
