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WM8771
DIGITAL AUDIO INTERFACE
MASTER AND SLAVE MODES
The audio interface operates in either Slave or Master mode, selectable using the MS control bit. In
both Master and Slave modes DACDAT is always an input to the WM8771 and ADCDAT is always
an output. The default is Slave mode.
In Slave mode (MS=0) ADCLRC, DACLRC and BCLK are inputs to the WM8771 (Figure 9).
DIN1/2/3/4, ADCLRC and DACLRC are sampled by the WM8771 on the rising edge of BCLK. ADC
data is output on DOUT and changes on the falling edge of BCLK. By setting control bit BCLKINV the
polarity of BCLK may be reversed so that DIN1/2/3/4, ADCLRC and DACLRC are sampled on the
falling edge of BCLK and DOUT changes on the rising edge of BCLK.
BCLK
ADCLRC
DSP
WM8771
CODEC
ENCODER/
DECODER
DACLRC
DOUT
DIN1/2/3/4
4
Figure 9 Slave Mode
In Master mode (MS=1) ADCLRC, DACLRC and BCLK are outputs from the WM8771 (Figure 10).
ADCLRC, DACLRC and BITCLK are generated by the WM8771. DIN1/2/3/4 are sampled by the
WM8771 on the rising edge of BCLK so the controller must output DAC data that changes on the
falling edge of BCLK. ADCDAT is output on DOUT and changes on the falling edge of BCLK. By
setting control bit BCLKINV the polarity of BCLK may be reversed so that DIN1/2/3/4 are sampled on
the falling edge of BCLK and DOUT changes on the rising edge of BCLK.
BCLK
ADCLRC
DSP/
WM8771
CODEC
ENCODER/
DECODER
DACLRC
DOUT
DIN1/2/3/4
4
Figure 10 Master Mode
PP Rev 2.0 December 2001
17
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
