WM8766
Preliminary Technical Data
DMUTE [2:0]
000
DAC CHANNEL 1
Not MUTE
MUTE
DAC CHANNEL 2
Not MUTE
Not MUTE
MUTE
DAC CHANNEL 3
Not MUTE
Not MUTE
Not MUTE
Not MUTE
MUTE
001
010
Not MUTE
MUTE
011
MUTE
100
Not MUTE
MUTE
Not MUTE
Not MUTE
MUTE
101
MUTE
110
Not MUTE
MUTE
MUTE
111
MUTE
MUTE
Setting the MUTEALL register bit will apply a 'soft' mute to the input of all the DAC digital filters:
REGISTER ADDRESS
0000010
BIT
LABEL
DEFAULT
DESCRIPTION
Soft Mute Select:
0
MUTEALL
0
DAC Mute
0 : Normal operation
1: Soft mute all channels
Refer to Figure 7 for the plot of application and release of soft mute.
1.5
1
0.5
0
-0.5
-1
-1.5
-2
-2.5
0
0.001
0.002
0.003
0.004
0.005
0.006
Time(s)
Figure 17 Application and Release of Soft Mute
Figure 17 shows the application and release of MUTE whilst a full amplitude sinusoid is being played
at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace) begins to
decay exponentially from the DC level of the last input sample. The output will decay towards VMID
with a time constant of approximately 64 input samples. If MUTE is applied to all channels for 1024
or more input samples the outputs will be connected directly to VMID if IZD is set. When MUTE is de-
asserted, the output will restart immediately from the current input sample.
Note that all other means of muting the DAC channels: setting the PL[3:0] bits to 0, setting the
PDWN bit or setting attenuation to 0 will cause much more abrupt muting of the output.
PTD Rev 2.3 February 2004
22
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WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
