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WM8753LEB/V 参数 Datasheet PDF下载

WM8753LEB/V图片预览
型号: WM8753LEB/V
PDF下载: 下载PDF文件 查看货源
内容描述: HI FI和电话双CODEC [HI FI AND TELEPHONY DUAL CODEC]
分类和应用: 电话
文件页数/大小: 87 页 / 1033 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8753L  
Advanced Information  
REGISTER  
ADDRESS  
BIT  
3:2  
LABEL  
DEFAULT  
00  
DESCRIPTION  
Interface mode  
R5 (05h)  
IFMODE [1:0]  
Digital Audio  
Interface  
Control  
00 = Voice Codec + HiFi DAC.  
01 = Voice Codec on HiFi interface.  
10 = HiFi over HiFi interface.  
11 = HiFi over HiFi interface, using  
VXFS for ADC frame sync.  
1
0
VXFSOE  
LRCOE  
1
1
Configures direction of VXFS pin in  
master mode  
0 = Pin is input  
1 = Pin is output  
Configures direction of LRC pin in  
master mode  
0 = Pin is input  
1 = Pin is output  
Table 56 Audio Interface Control  
Control bits VXCLKTRI, BCLKTRI, VXDTRI and ADCDTRI configure the Hi-Fi and Voice  
interface pins BCLK, VXCLK, ADCDAT and VXDOUT as inputs or tristate. This allows the I2S  
and PCM interfaces to be connected to an interface bus and all outputs onto the bus tristated  
or switched to inputs. The default state for all audio interface PMS is input or tristate.  
REGISTER  
ADDRESS  
BIT  
LABEL  
DEFAULT  
DESCRIPTION  
VXCLK tristate  
0 = VXCLK pin configured as input or  
output as set by PMS  
R5 (05h)  
7
6
VXCLKTRI  
0
Digital Audio  
Interface  
Control  
1 = VXCLK pin tristated and used as  
input  
BCLKTRI  
0
BCLK tristate  
0 = BCLK pin configured as input or  
output as set by MS  
1 = BCLK pin tristated and used as input  
5
4
VXDTRI  
1
1
VXDOUT tristate  
0 = VXDOUT pin enabled as output  
1 = VXDOUT pin tristated  
ADCDTRI  
ADCDAT tristate  
0 = ADCDAT pin enabled as output  
1 = ADCDAT pin tristated  
Table 57 PCM and Hi-Fi Interface Tristate  
CONTROL INTERFACE  
SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS  
The control interface can operate as either a 3-wire or 2-wire MPU interface. The MODE/GPIO3 pin is  
sampled at power-up, latched and used to select the interface format. After power-up MODE/GPIO3  
is available for general purpose use. The CSB/GPIO5 pin is also sampled and latched on power-up  
and, if 2-wire mode is selected, the latched value selects the 2-wire mode address. For 3-wire mode  
CSB/GPIO5 is always an input. After power-up in 2-wire mode CSB/GPIO5 is available for general  
purpose use. See MODE/GPIO3 and CSB/GPIO5 LATCH on Power-up Timing Information on page  
9.  
The WM8753L is controlled by writing to registers through a serial control interface. A control word  
consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which control register is  
accessed. The remaining 9 bits (B8 to B0) are register bits, corresponding to the 9 bits in each control  
register.  
AI Rev 3.1 June 2004  
61  
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