Advanced Information
WM8753L
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
00
DESCRIPTION
Line Mix Select:
00: LINE1 + LINE2
01: LINE1 – LINE2
R47 (2Fh)
Input Control (1)
LMSEL[1:0]
[4:3]
10: LINE1 (LINE2 disconnected)
11: LINE2 (LINE1 disconnected)
MM
RM
LM
0
0
0
Mono Mux Select
0 : Line Mix Output
1: Rx Mix output ( RXP +/– RXN )
2
1
0
Right Mux Select
0 : LINE2
1 : Rx Mix output ( RXP +/– RXN )
Left Mux Select
0 : LINE1
1 : Rx Mix output ( RXP +/– RXN )
Table 4 Input and Bypass Mux Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R48 (30h)
Input Control (2)
RXMSEL[1:0]
00
Differential input, Rx, mixer
00: RXP – RXN
[7:6]
01: RXP + RXN
10: RXP (RXN disconnected)
11: RXN (RXP disconnected)
MICMUX[1:0]
00
Mic Mux Sidetone Select
[5:4]
00 : Sidetone = Left PGA output
01 : Sidetone = Mic 1 preamp output
10 : Sidetone = Mic 2 preamp output
11 : Sidetone = Right PGA output
LINEALC
MIC2ALC
MIC1ALC
RXALC
0
0
0
0
ALC Mix input select Line Mix
0 : Line Mix not selected into ALC Mix
1 : Line Mix selected into ALC Mix
3
2
1
0
ALC Mix input select MIC2
0 : MIC2 not selected into ALC Mix
1 : MIC2 selected into ALC Mix
ALC Mix input select MIC1
0 : MIC1 not selected into ALC Mix
1 : MIC1 selected into ALC Mix
ALC Mix input select RX
0 : RX not selected into ALC Mix
1 : RX selected into ALC Mix
Table 5 ALC Mix and Mic Mux Input Select
AI Rev 3.1 June 2004
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