Advanced Information
WM8753L
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
00
DESCRIPTION
R2 (02h)
ADC control
[6:5] ADCPOL[1:0]
00 = Polarity not inverted
01 = L polarity invert
10 = R polarity invert
11 = L and R polarity invert
Table 11 ADC Polarity Control
SINGLE ENDED OPERATION
It is possible to connect up to three microphones single endedly. Microphone1 is connected to the
MIC1 input , microphone2 to the MIC2 input, microphone3 to the MIC2N input and MIC1N is
connected to Vref. The gains, MIC1BOOST and MIC2BOOST, should be set to be identical and
micamp2 must be disabled. Any of the three microphones can then be selected as the output from
micamp1 using MICSEL.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
00
DESCRIPTION
R51 (33h)
Mic Select
MICSEL[1:0]
Microphone selected
[7:6]
00 : MIC1
01 : MIC2
10 : MIC3
11 : unused
Table 12 MIC Select Control
MICROPHONE BIASING CIRCUIT
The MICBIAS output provides a low noise reference voltage suitable for biasing electret type
microphones and the associated external resistor biasing network. Refer to the Applications
Information section for recommended external components. The MICBIAS voltage can be altered via
the MBVSEL register bit.
When MBVSEL=0, MICBIAS=0.9*AVDD and when MBVSEL=1,
MICBIAS=0.75*AVDD. The output can be enabled or disabled using the MICB control bit (see also
the “Power Management” section).
REGISTER
ADDRESS
BIT
LABEL
MICB
DEFAULT
DESCRIPTION
R20 (14h)
5
0
Microphone Bias Enable
Power
Management (1)
0 = OFF (high impedance output)
1 = ON
Table 13 Microphone Bias Control
REGISTER
ADDRESS
BIT
LABEL
MBVSEL
DEFAULT
DESCRIPTION
R51 (33h)
Mic bias comp
control
8
0
Microphone Bias Voltage Control
0 = 0.9 * AVDD
1 = 0.75 * AVDD
Table 14 Microphone Bias Voltage Control
The internal MICBIAS circuitry is shown in Figure 8. Note that the maximum source current capability
for MICBIAS is 3mA. The external biasing resistors therefore must be large enough to limit the
MICBIAS current to 3mA.
AI Rev 3.1 June 2004
26
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